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[84.1.217.106]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-c2a9c5b7359sm113380866b.38.2026.09.22.08.34.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 22 Sep 2026 08:34:13 -0700 (PDT) From: Timur =?UTF-8?B?S3Jpc3TDs2Y=?= To: amd-gfx@lists.freedesktop.org, alexander.deucher@amd.com, Bing.Ma@amd.com, James Zhu Cc: James Zhu , Natalie Vock , Christian =?UTF-8?B?S8O2bmln?= Subject: Re: [PATCH 01/12] drm/amdgpu: add profiler UAPI definitions Date: Tue, 22 Sep 2026 17:34:13 +0200 Message-ID: <-2dFiumdQ7an8e02CFlfgw@gmail.com> In-Reply-To: <3553c2d2-ca84-4333-a3cf-e3c745eaad1f@amd.com> References: <20260921200313.865829-1-James.Zhu@amd.com> <3553c2d2-ca84-4333-a3cf-e3c745eaad1f@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" On Tuesday, September 22, 2026 5:32:12=E2=80=AFPM Central European Summer T= ime James=20 Zhu wrote: > On 2026-09-22 11:22, Timur Krist=C3=B3f wrote: > > On Tuesday, September 22, 2026 5:20:41=E2=80=AFPM Central European Summ= er Time > > James>=20 > > Zhu wrote: > >> On 2026-09-22 11:09, Timur Krist=C3=B3f wrote: > >>> On Monday, September 21, 2026 10:03:02=E2=80=AFPM Central European Su= mmer Time > >>> James> > >>>=20 > >>> Zhu wrote: > >>>> Add the DRM_AMDGPU_PROFILER ioctl number and its argument structures, > >>>> the > >>>> UAPI for GPU performance monitoring features such as SPM (Stream > >>>> Performance Monitor). > >>>>=20 > >>>> struct drm_amdgpu_profiler_args carries an operation selector and a > >>>> union > >>>> of per-operation parameters, currently AMDGPU_PROFILER_OP_GET_VER and > >>>> AMDGPU_PROFILER_OP_SPM. The SPM operations and the layout of the > >>>> destination buffer are described by struct drm_amdgpu_spm_args and > >>>> struct drm_amdgpu_spm_buffer_header. > >>>>=20 > >>>> The ioctl number and struct layout are frozen here. The implementati= on > >>>> lands in the rest of this series and the ioctl is not registered in > >>>> amdgpu_ioctls_kms[] until then, so this header change alone does not > >>>> make > >>>> the interface reachable. > >>>>=20 > >>>> Signed-off-by: James Zhu > >>>> Reviewed-by: Bing Ma > >>>=20 > >>> Hi, > >>>=20 > >>> Can you guys please clarify why this is necessary and what the use ca= se > >>> is? > >>>=20 > >>> Are we sure we want a uAPI for this? RADV has been using SPM from > >>> userspace > >>> for many years now. > >>=20 > >> [JZ] current RADV SPM is for graphic engine. These patches are for > >> compute engine SPM. > >>=20 > >> Thanks! > >=20 > > Is there any reason why it can't be done in userspace for compute too? >=20 > [JZ] for compute engine, user space is using ROCM stack , not RADV. Is there any reason why SPM can't be handled from userspace? (Regardless of whether that userspace is RADV or ROCm)