RE: [PATCH v2 08/10] arm64: dts: exynos: axis: Add initial ARTPEC-8 SoC support

["Ravi Patel" <ravi.patel@samsung.com>]

> -----Original Message-----
> From: Krzysztof Kozlowski <krzk@kernel.org>
> Sent: 22 August 2025 12:09
> To: Ravi Patel <ravi.patel@samsung.com>; jesper.nilsson@axis.com; mturquette@baylibre.com; sboyd@kernel.org;
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> Subject: Re: [PATCH v2 08/10] arm64: dts: exynos: axis: Add initial ARTPEC-8 SoC support
> 
> On 21/08/2025 14:32, Ravi Patel wrote:
> > From: SungMin Park <smn1196@coasia.com>
> >
> > Add initial device tree support for Axis ARTPEC-8 SoC.
> >
> > This SoC contains 4 Cortex-A53 CPUs and several other peripheral IPs.
> >
> > Signed-off-by: SungMin Park <smn1196@coasia.com>
> > Signed-off-by: SeonGu Kang <ksk4725@coasia.com>
> > Signed-off-by: Ravi Patel <ravi.patel@samsung.com>
> ...
> 
> > +
> > +	timer {
> > +		compatible = "arm,armv8-timer";
> > +		interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
> 
> No CPU mask?

Thanks for review and pointing out.

Yes. You are right.
I will add GIC_CPU_MASK_SIMPLE(4) in next version as this uses GICv2 (gic-400) not GICv3.

This may be carried out from other exynos/fsd platforms

I found below 2 related links.
https://lkml.org/lkml/2025/6/13/1073
https://lkml.org/lkml/2023/11/28/403

Thanks,
Ravi

> 
> > +			     <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
> > +			     <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
> > +			     <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
> > +	};
> > +};
> 
> 
> Best regards,
> Krzysztof