From: "Jingoo Han" <jingoohan1@gmail.com>
To: "'Kishon Vijay Abraham I'" <kishon@ti.com>,
"'Gustavo Pimentel'" <gustavo.pimentel@synopsys.com>,
<marc.zyngier@arm.com>, <Joao.Pinto@synopsys.com>,
<bhelgaas@google.com>
Cc: <linux-pci@vger.kernel.org>, <m-karicheri2@ti.com>,
<thomas.petazzoni@free-electrons.com>,
<minghuan.Lian@freescale.com>, <mingkai.hu@freescale.com>,
<tie-fei.zang@freescale.com>, <hongxing.zhu@nxp.com>,
<l.stach@pengutronix.de>, <niklas.cassel@axis.com>,
<jesper.nilsson@axis.com>, <wangzhou1@hisilicon.com>,
<gabriele.paoloni@huawei.com>, <svarbanov@mm-sol.com>,
<nsekhar@ti.com>
Subject: Re: [PATCH v3 7/9] pci: keystone SoC driver adapted to new irq API
Date: Thu, 28 Dec 2017 11:13:53 -0500 [thread overview]
Message-ID: <000201d37ff6$dbdb6fb0$93924f10$@gmail.com> (raw)
In-Reply-To: <10d22382-4914-da3b-a842-eb33693c7a83@ti.com>
On Thursday, December 28, 2017 7:44 AM, Kishon Vijay Abraham I wrote:
>
> Hi Gustavo,
>
> On Thursday 28 December 2017 05:26 PM, Gustavo Pimentel wrote:
> > This patch adapts Keystone SoC specific driver to use the new interrupt
> api
> > available in pcie-designware. A new callback was added to
> dw_pcie_host_ops
> > to handle a specific Keystone function and msi_host_init callback is
> > changed to simplify the access to pci data structure for keystone all
> SoC
> > drivers that use the structure.
> >
> > Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
> > ---
> > Change v1->v2:
> > - Removed hardcoded num_vectors configuration (now it is done in the
> core driver by default)
> > Change v2->v3:
> > -
> >
> >
> >
> >
> >
> > drivers/pci/dwc/pci-keystone-dw.c | 88
++---------------------------
> -----
> > drivers/pci/dwc/pci-keystone.c | 1 +
> > drivers/pci/dwc/pci-keystone.h | 4 +-
> > drivers/pci/dwc/pci-layerscape.c | 3 +-
> > drivers/pci/dwc/pcie-designware-host.c | 19 ++++++--
> > drivers/pci/dwc/pcie-designware.h | 3 +-
>
> The designware specific patches should be part of
> "[1/9] pci: adding new irq api to pci-designware"
>
> Also layerscap is not related to $subject.
Yes, right.
To Gustavo,
Please split this patch to two patches.
>
> Thanks
> Kishon
next prev parent reply other threads:[~2017-12-28 16:13 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-12-28 11:56 [PATCH v3 0/9] add new irq api to pcie-designware Gustavo Pimentel
2017-12-28 11:56 ` [PATCH v3 1/9] pci: adding new irq api to pci-designware Gustavo Pimentel
2017-12-29 9:52 ` Kishon Vijay Abraham I
2017-12-29 18:29 ` Gustavo Pimentel
2017-12-28 11:56 ` [PATCH v3 2/9] pci: exynos SoC driver adapted to new irq API Gustavo Pimentel
2017-12-28 11:56 ` [PATCH v3 3/9] pci: imx6 " Gustavo Pimentel
2017-12-28 11:56 ` [PATCH v3 4/9] pci: artpec6 " Gustavo Pimentel
2017-12-28 11:56 ` [PATCH v3 5/9] pci: generic PCIe DW " Gustavo Pimentel
2017-12-28 11:56 ` [PATCH v3 6/9] pci: qcom SoC " Gustavo Pimentel
2017-12-28 11:56 ` [PATCH v3 7/9] pci: keystone " Gustavo Pimentel
2017-12-28 12:43 ` Kishon Vijay Abraham I
2017-12-28 16:13 ` Jingoo Han [this message]
2017-12-29 9:33 ` Gustavo Pimentel
2017-12-29 10:10 ` Kishon Vijay Abraham I
2017-12-29 10:08 ` Kishon Vijay Abraham I
2018-01-02 19:03 ` Gustavo Pimentel
2017-12-28 11:56 ` [PATCH v3 8/9] pci: removing old irq api from pcie-designware Gustavo Pimentel
2017-12-28 11:56 ` [PATCH v3 9/9] pci: remove limitation of the number of the available IRQs Gustavo Pimentel
2017-12-28 18:56 ` [PATCH v3 0/9] add new irq api to pcie-designware Bjorn Helgaas
2017-12-29 14:07 ` Gustavo Pimentel
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