From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Return-Path: From: "Jingoo Han" To: "'Dongdong Liu'" , "'Khuong Dinh'" , "'Jon Masters'" , "'Lorenzo Pieralisi'" , References: <20170419164913.19674-1-lorenzo.pieralisi@arm.com> <2e24e205-d761-9172-9463-4a53e1a0de4d@jonmasters.org> <361fde15-5ba3-d33b-f946-003e89ba071f@huawei.com> In-Reply-To: <361fde15-5ba3-d33b-f946-003e89ba071f@huawei.com> Subject: Re: [PATCH v4 00/21] PCI: fix config space memory mappings Date: Wed, 26 Apr 2017 13:24:48 -0400 Message-ID: <000501d2beb2$023b9100$06b2b300$@gmail.com> MIME-Version: 1.0 List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: 'Pratyush Anand' , 'Gabriele Paoloni' , 'Catalin Marinas' , 'Shawn Lin' , 'Will Deacon' , 'Linuxarm' , 'Michal Simek' , 'Thierry Reding' , 'Tanmay Inamdar' , 'Zhou Wang' , 'Joao Pinto' , 'Jonathan Corbet' , 'Wenrui Li' , 'Russell King' , 'Bharat Kumar Gogada' , 'Murali Karicheri' , 'Benjamin Herrenschmidt' , 'Arnd Bergmann' , 'Jon Mason' , 'Ray Jui' , 'John Garry' , 'Bjorn Helgaas' , 'Mingkai Hu' , linux-arm-kernel@lists.infradead.org, 'Thomas Petazzoni' , linux-kernel@vger.kernel.org, 'Stanimir Varbanov' , 'Minghuan Lian' , "'Luis R . Rodriguez'" , 'Roy Zang' Content-Type: text/plain; charset="utf-8" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+bjorn=helgaas.com@lists.infradead.org List-ID: T24gV2VkbmVzZGF5LCBBcHJpbCAyNiwgMjAxNyA2OjU0IEFNLCBEb25nZG9uZyBMaXUgd3JvdGU7 Cj4gCj4gVGVzdGVkLWJ5OiBEb25nZG9uZyBMaXUgPGxpdWRvbmdkb25nM0BodWF3ZWkuY29tPgo+ IAo+IEkgdGVzdGVkIHRoZSBwYXRjaHNldCBvbiBIaVNpbGljb24gQVJNNjQgRDA1IGJvYXJkLkl0 IHdvcmtzIG9rIHdpdGggODI1OTkKPiBuZXRjYXJkLgoKVGhhbmsgeW91IGZvciB0ZXN0aW5nIHRo ZXNlIHBhdGNoZXMuIEhpU2lsaWNvbiBQQ0llIG1heSB1c2UgRGVzaWdud2FyZS1iYXNlZApQQ0ll IGNvbnRyb2xsZXIuIEluIG15IG9waW5pb24sIG90aGVyIERlc2lnbndhcmUtYmFzZWQgUENJZSBj b250cm9sbGVyIHdpbGwKd29yayBwcm9wZXJseS4KClRvIERvbmdkb25nIExpdSwgS2h1b25nIERp bmgsIGFuZCBvdGhlciBwZW9wbGUsCklmIHBvc3NpYmxlLCBjYW4geW91IGNoZWNrIHRoZSBvdXRw dXQgb2YgJ2xzcGNpIC12Jz8KSWYgeW91IGZpbmQgc29tZXRoaW5nIGRpZmZlcmVudCwgcGxlYXNl IHNoYXJlIGl0IHdpdGggdXMuCkdvb2QgbHVjay4KCkJlc3QgcmVnYXJkcywKSmluZ29vIEhhbgoK PiAKPiBUaGFua3MsCj4gRG9uZ2RvbmcKPiDlnKggMjAxNy80LzI1IDE0OjQwLCBKb24gTWFzdGVy cyDlhpnpgZM6Cj4gPiBPbiAwNC8xOS8yMDE3IDEyOjQ4IFBNLCBMb3JlbnpvIFBpZXJhbGlzaSB3 cm90ZToKPiA+Cj4gPj4gT24gc29tZSBwbGF0Zm9ybXMgKGllIEFSTS9BUk02NCkgaW9yZW1hcCBm YWlscyB0byBjb21wbHkgd2l0aCB0aGUgUENJCj4gPj4gY29uZmlndXJhdGlvbiBub24tcG9zdGVk IHdyaXRlIHRyYW5zYWN0aW9ucyByZXF1aXJlbWVudCwgYmVjYXVzZSBpdAo+ID4+IHByb3ZpZGVz IGEgbWVtb3J5IG1hcHBpbmcgdGhhdCBpc3N1ZXMgImJ1ZmZlcmFibGUiIG9yLCBpbiBQQ0kgdGVy bXMKPiA+PiAicG9zdGVkIiB3cml0ZSB0cmFuc2FjdGlvbnMuIExpa2V3aXNlLCB0aGUgY3VycmVu dCBwY2lfcmVtYXBfaW9zcGFjZSgpCj4gPj4gaW1wbGVtZW50YXRpb24gbWFwcyB0aGUgcGh5c2lj YWwgYWRkcmVzcyByYW5nZSB0aGF0IHRoZSBQQ0kgdHJhbnNsYXRlcwo+ID4+IHRvIEkvTyBzcGFj ZSBjeWNsZXMgdG8gdmlydHVhbCBhZGRyZXNzIHNwYWNlIHRocm91Z2ggcGdwcm90X2RldmljZSgp Cj4gPj4gYXR0cmlidXRlcyB0aGF0IG9uIGVnIEFSTTY0IHByb3ZpZGVzIGEgbWVtb3J5IG1hcHBp bmcgaXNzdWluZwo+ID4+IHBvc3RlZCB3cml0ZXMgdHJhbnNhY3Rpb25zLCB3aGljaCBpcyBub3Qg UENJIHNwZWNpZmljYXRpb25zIGNvbXBsaWFudC4KPiA+Cj4gPiBTaWRlIG5vdGUgdGhhdCBJJ3Zl IHBpbmdlZCBhbGwgb2YgdGhlIEFSTSBzZXJ2ZXIgdmVuZG9ycyBhbmQgYXNrZWQgdGhlbQo+ID4g dG8gdmVyaWZ5IHRoaXMgcGF0Y2ggc2VyaWVzIG9uIHRoZWlyIHBsYXRmb3Jtcy4KPiA+Cj4gPiBK b24uCj4gPgo+ID4gLgo+ID4KCgpfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fXwpsaW51eC1hcm0ta2VybmVsIG1haWxpbmcgbGlzdApsaW51eC1hcm0ta2VybmVs QGxpc3RzLmluZnJhZGVhZC5vcmcKaHR0cDovL2xpc3RzLmluZnJhZGVhZC5vcmcvbWFpbG1hbi9s aXN0aW5mby9saW51eC1hcm0ta2VybmVsCg== From mboxrd@z Thu Jan 1 00:00:00 1970 From: jingoohan1@gmail.com (Jingoo Han) Date: Wed, 26 Apr 2017 13:24:48 -0400 Subject: [PATCH v4 00/21] PCI: fix config space memory mappings In-Reply-To: <361fde15-5ba3-d33b-f946-003e89ba071f@huawei.com> References: <20170419164913.19674-1-lorenzo.pieralisi@arm.com> <2e24e205-d761-9172-9463-4a53e1a0de4d@jonmasters.org> <361fde15-5ba3-d33b-f946-003e89ba071f@huawei.com> Message-ID: <000501d2beb2$023b9100$06b2b300$@gmail.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Wednesday, April 26, 2017 6:54 AM, Dongdong Liu wrote; > > Tested-by: Dongdong Liu > > I tested the patchset on HiSilicon ARM64 D05 board.It works ok with 82599 > netcard. Thank you for testing these patches. HiSilicon PCIe may use Designware-based PCIe controller. In my opinion, other Designware-based PCIe controller will work properly. To Dongdong Liu, Khuong Dinh, and other people, If possible, can you check the output of 'lspci -v'? If you find something different, please share it with us. Good luck. Best regards, Jingoo Han > > Thanks, > Dongdong > ? 2017/4/25 14:40, Jon Masters ??: > > On 04/19/2017 12:48 PM, Lorenzo Pieralisi wrote: > > > >> On some platforms (ie ARM/ARM64) ioremap fails to comply with the PCI > >> configuration non-posted write transactions requirement, because it > >> provides a memory mapping that issues "bufferable" or, in PCI terms > >> "posted" write transactions. Likewise, the current pci_remap_iospace() > >> implementation maps the physical address range that the PCI translates > >> to I/O space cycles to virtual address space through pgprot_device() > >> attributes that on eg ARM64 provides a memory mapping issuing > >> posted writes transactions, which is not PCI specifications compliant. > > > > Side note that I've pinged all of the ARM server vendors and asked them > > to verify this patch series on their platforms. > > > > Jon. > > > > . > > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752930AbdDZRZE (ORCPT ); Wed, 26 Apr 2017 13:25:04 -0400 Received: from mail-qk0-f194.google.com ([209.85.220.194]:35117 "EHLO mail-qk0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752846AbdDZRYw (ORCPT ); Wed, 26 Apr 2017 13:24:52 -0400 From: "Jingoo Han" To: "'Dongdong Liu'" , "'Khuong Dinh'" , "'Jon Masters'" , "'Lorenzo Pieralisi'" , Cc: , , "'Pratyush Anand'" , "'Arnd Bergmann'" , "'Jonathan Corbet'" , "'Will Deacon'" , "'Bjorn Helgaas'" , "'Mingkai Hu'" , "'Tanmay Inamdar'" , "'Murali Karicheri'" , "'Russell King'" , "'Bharat Kumar Gogada'" , "'Ray Jui'" , "'Wenrui Li'" , "'Shawn Lin'" , "'Minghuan Lian'" , "'Catalin Marinas'" , "'Jon Mason'" , "'Gabriele Paoloni'" , "'Thomas Petazzoni'" , "'Joao Pinto'" , "'Thierry Reding'" , "'Luis R . Rodriguez'" , "'Michal Simek'" , "'Stanimir Varbanov'" , "'Zhou Wang'" , "'Roy Zang'" , "'Benjamin Herrenschmidt'" , "'John Garry'" , "'Linuxarm'" References: <20170419164913.19674-1-lorenzo.pieralisi@arm.com> <2e24e205-d761-9172-9463-4a53e1a0de4d@jonmasters.org> <361fde15-5ba3-d33b-f946-003e89ba071f@huawei.com> In-Reply-To: <361fde15-5ba3-d33b-f946-003e89ba071f@huawei.com> Subject: Re: [PATCH v4 00/21] PCI: fix config space memory mappings Date: Wed, 26 Apr 2017 13:24:48 -0400 Message-ID: <000501d2beb2$023b9100$06b2b300$@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" X-Mailer: Microsoft Outlook 16.0 Thread-Index: AQMEXGkO3eUKaJOMePDUqvXZRiCR0wFaI1eGAT3+HeifX+fr4A== Content-Language: ko Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: 8bit X-MIME-Autoconverted: from quoted-printable to 8bit by mail.home.local id v3QHQwjB004517 On Wednesday, April 26, 2017 6:54 AM, Dongdong Liu wrote; > > Tested-by: Dongdong Liu > > I tested the patchset on HiSilicon ARM64 D05 board.It works ok with 82599 > netcard. Thank you for testing these patches. HiSilicon PCIe may use Designware-based PCIe controller. In my opinion, other Designware-based PCIe controller will work properly. To Dongdong Liu, Khuong Dinh, and other people, If possible, can you check the output of 'lspci -v'? If you find something different, please share it with us. Good luck. Best regards, Jingoo Han > > Thanks, > Dongdong > 在 2017/4/25 14:40, Jon Masters 写道: > > On 04/19/2017 12:48 PM, Lorenzo Pieralisi wrote: > > > >> On some platforms (ie ARM/ARM64) ioremap fails to comply with the PCI > >> configuration non-posted write transactions requirement, because it > >> provides a memory mapping that issues "bufferable" or, in PCI terms > >> "posted" write transactions. Likewise, the current pci_remap_iospace() > >> implementation maps the physical address range that the PCI translates > >> to I/O space cycles to virtual address space through pgprot_device() > >> attributes that on eg ARM64 provides a memory mapping issuing > >> posted writes transactions, which is not PCI specifications compliant. > > > > Side note that I've pinged all of the ARM server vendors and asked them > > to verify this patch series on their platforms. > > > > Jon. > > > > . > >