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Wysocki'" , "'Daniel Lezcano'" , "'Zhang Rui'" , "'Lukasz Luba'" , "'Rob Herring'" , "'Conor Dooley'" , "'Alim Akhtar'" Cc: , , , , In-Reply-To: Subject: RE: [PATCH 3/3] arm64: dts: exynosautov920: Add tmu hardware binding Date: Tue, 2 Sep 2025 18:06:47 +0900 Message-ID: <000501dc1be8$e9ac0640$bd0412c0$@samsung.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Mailer: Microsoft Outlook 15.0 Thread-Index: AQJ8jFumlJsm8aby6NwUOPwCr1UY/AFeDEJ7AytiP1UDOWYPQrMAn3WQ Content-Language: ko X-CMS-MailID: 20250902090648epcas2p296bd62ad9bb707f5671c50d2c21877ac X-Msg-Generator: CA Content-Type: text/plain; charset="utf-8" X-Sendblock-Type: AUTO_CONFIDENTIAL CMS-TYPE: 102P cpgsPolicy: CPGSC10-234,Y X-CFilter-Loop: Reflected X-CMS-RootMailID: 20250825064933epcas2p40a7c491366097f90add675bc36822ef9 References: <20250825064929.188101-1-shin.son@samsung.com> <20250825064929.188101-4-shin.son@samsung.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250902_020655_266127_7090A17B X-CRM114-Status: GOOD ( 35.14 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hello Krzysztof Kozlowski, > -----Original Message----- > From: Krzysztof Kozlowski =5Bmailto:krzk=40kernel.org=5D > Sent: Saturday, August 30, 2025 6:08 PM > To: Shin Son ; Bartlomiej Zolnierkiewicz > ; Rafael J . Wysocki ; Daniel > Lezcano ; Zhang Rui ; > Lukasz Luba ; Rob Herring ; Con= or > Dooley ; Alim Akhtar > Cc: linux-pm=40vger.kernel.org; linux-samsung-soc=40vger.kernel.org; > devicetree=40vger.kernel.org; linux-arm-kernel=40lists.infradead.org; lin= ux- > kernel=40vger.kernel.org > Subject: Re: =5BPATCH 3/3=5D arm64: dts: exynosautov920: Add tmu hardware > binding >=20 > On 25/08/2025 08:49, Shin Son wrote: > > Create a new exynosautov920-tmu.dtsi describing new TMU hardware and > > include it from exynosautov920.dtsi. > > > > The exynosautov920-tmu node uses the misc clock as its source and > > exposes two new DT properties: > > > > - tmu-name: identifies the TMU variant for sensor skipping > > - sensor-index-ranges: defines valid sensor index ranges for the > > bitmap > > > > This TMU binding defines six thermal zones with a critical trip point > > at 125 degrees: > > > > tmu_top : cpucl0-left, cpucl1 > > tmu_sub0: cpucl0-right, cpucl2 > > tmu_sub1: g3d, npu > > > > Signed-off-by: Shin Son > > --- > > .../boot/dts/exynos/exynosautov920-tmu.dtsi =7C 92 +++++++++++++++++= ++ > > .../arm64/boot/dts/exynos/exynosautov920.dtsi =7C 34 +++++++ > > 2 files changed, 126 insertions(+) > > create mode 100644 arch/arm64/boot/dts/exynos/exynosautov920-tmu.dtsi > > > > diff --git a/arch/arm64/boot/dts/exynos/exynosautov920-tmu.dtsi > > b/arch/arm64/boot/dts/exynos/exynosautov920-tmu.dtsi > > new file mode 100644 > > index 000000000000..fa88e9bcdfec > > --- /dev/null > > +++ b/arch/arm64/boot/dts/exynos/exynosautov920-tmu.dtsi > > =40=40 -0,0 +1,92 =40=40 > > +// SPDX-License-Identifier: GPL-2.0 > > +/* > > + * Samsung's ExynosAuto920 TMU configurations device tree source > > + * > > + * Copyright (c) 2020 Samsung Electronics Co., Ltd. > > + * > > + * Samsung's ExynosAuto920 SoC TMU(Thermal Managemenut Unit) are > > +listed as > > + * device tree nodes in this file. > > + */ > > + > > +/ =7B > > + thermal-zones =7B > > + cpucl0left-thermal =7B > > + polling-delay-passive =3D <0>; > > + polling-delay =3D <0>; > > + thermal-sensors =3D <&tmuctrl_top 0>; > > + > > + trips =7B > > + cpucl0_0_critical: cpucl0-0-critical =7B > > + temperature =3D <125000>; /* > millicelsius */ > > + hysteresis =3D <0>; /* millicelsius */ > > + type =3D =22critical=22; > > + =7D; > > + =7D; > > + =7D; >=20 > Missing blank line. I'll remove the blank line. >=20 > > + cpucl0right-thermal =7B >=20 > It does not look like you tested the DTS against bindings. Please run > =60make dtbs_check W=3D1=60 (see Documentation/devicetree/bindings/writin= g- > schema.rst or https://protect2.fireeye.com/v1/url?k=3D004c918d-61c784be- > 004d1ac2-000babff9bb7-06e007e7dc12091d&q=3D1&e=3Dd6a22592-2d45-41f5-b737- > a90830cceaeb&u=3Dhttps%3A%2F%2Fwww.linaro.org%2Fblog%2Ftips-and-tricks-fo= r- > validating-devicetree-sources-with-the-devicetree-schema%2F > for instructions). > Maybe you need to update your dtschema and yamllint. Don't rely on distro > packages for dtschema and be sure you are using the latest released > dtschema. >=20 Actually, I also updated both dtschema and yamllint and ran =22make CHECK_D= TBS=3Dy W=3D1 exynos/exynosautov920-sadk.dtb=22, but no other issues were d= etected. I assume that the problem you mentioned about =22cpucl0right-thermal=22 mig= ht be related to the regex. Based on this assumption, I'll shorten the node name and include the change= in the next version. If that is not the case, I'll investigate it further from another angle. > > + polling-delay-passive =3D <0>; > > + polling-delay =3D <0>; > > + thermal-sensors =3D <&tmuctrl_sub0 0>; > > + > > + trips =7B > > + cpucl0_1_critical: cpucl0-1-critical =7B > > + temperature =3D <125000>; /* > millicelsius */ > > + hysteresis =3D <0>; /* millicelsius */ > > + type =3D =22critical=22; > > + =7D; > > + =7D; > > + =7D; > > + cpucl1-thermal =7B > > + polling-delay-passive =3D <0>; > > + polling-delay =3D <0>; > > + thermal-sensors =3D <&tmuctrl_top 1>; > > + > > + trips =7B > > + cpucl1_critical: cpucl1-critical =7B > > + temperature =3D <125000>; /* > millicelsius */ > > + hysteresis =3D <0>; /* millicelsius */ > > + type =3D =22critical=22; > > + =7D; > > + =7D; > > + =7D; > > + cpucl2-thermal =7B > > + polling-delay-passive =3D <0>; > > + polling-delay =3D <0>; > > + thermal-sensors =3D <&tmuctrl_sub0 1>; > > + > > + trips =7B > > + cpucl2_critical: cpucl2-critical =7B > > + temperature =3D <125000>; /* > millicelsius */ > > + hysteresis =3D <0>; /* millicelsius */ > > + type =3D =22critical=22; > > + =7D; > > + =7D; > > + =7D; > > + g3d-thermal =7B > > + polling-delay-passive =3D <0>; > > + polling-delay =3D <0>; > > + thermal-sensors =3D <&tmuctrl_sub1 0>; > > + > > + trips =7B > > + g3d_critical: g3d-critical =7B > > + temperature =3D <125000>; /* millicelsius > */ > > + hysteresis =3D <0>; /* millicelsius */ > > + type =3D =22critical=22; > > + =7D; > > + =7D; > > + =7D; > > + npu-thermal =7B > > + polling-delay-passive =3D <0>; > > + polling-delay =3D <0>; > > + thermal-sensors =3D <&tmuctrl_sub1 1>; > > + > > + trips =7B > > + npu_critical: npu-critical =7B > > + temperature =3D <125000>; /* millicelsius > */ > > + hysteresis =3D <0>; /* millicelsius */ > > + type =3D =22critical=22; > > + =7D; > > + =7D; > > + =7D; > > + =7D; > > +=7D; > > diff --git a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi > > b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi > > index 0fdf2062930a..a4ff941f8e43 100644 > > --- a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi > > +++ b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi > > =40=40 -330,6 +330,39 =40=40 watchdog_cl1: watchdog=4010070000 =7B > > samsung,cluster-index =3D <1>; > > =7D; > > > > + tmuctrl_top: tmutop-thermal=40100a0000 =7B >=20 > Node names should be generic. See also an explanation and list of example= s > (not exhaustive) in DT specification: > https://protect2.fireeye.com/v1/url?k=3Dfbd86cff-9a5379cc-fbd9e7b0- > 000babff9bb7-cfe00d75a7b0cdcf&q=3D1&e=3Dd6a22592-2d45-41f5-b737- > a90830cceaeb&u=3Dhttps%3A%2F%2Fdevicetree- > specification.readthedocs.io%2Fen%2Flatest%2Fchapter2-devicetree- > basics.html%23generic-names-recommendation > If you cannot find a name matching your device, please check in kernel > sources for similar cases or you can grow the spec (via pull request to D= T > spec repo). >=20 >=20 > Best regards, > Krzysztof Okay, I'll change the node names(e.g., tmutop-thermal ...) to be more gener= ic. After reviewing the existing kernel source, I noticed that nodes are writte= n in the form of tmu=40..., so I will adopt that convention. These changes will be included in the next version. Thank you.