From mboxrd@z Thu Jan  1 00:00:00 1970
From: Melvin Chow <melvinc@elecomes.com>
Date: Fri, 24 Apr 2015 23:10:46 +1000
Subject: [ath9k-devel] how to hack the ath9k code and disable 5GHz?
Message-ID: <002001d07e90$15856b00$40904100$@elecomes.com>
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To: ath9k-devel@lists.ath9k.org

HI, 

 

I have been given some hints by the developer to disable the ath9k 5GHz
channel by hacking the init.c files

He mentioned I could change ath9k_init_softc() in init.c and find an
appropriate place to set ah->disable_5ghz to true. A simple grep for
disable_5ghz would have shown this easily.

 

Is there any one could help to find out where is an appropriate place in the
init.c file to put the right code in?

I have been stop the project in here for almost a month.hope there is some
expert could provide support.

Below is the original init.c code in the kernel 4.0 

/////////////////////////////////////////

static int ath9k_init_softc(u16 devid, struct ath_softc *sc,

                                                    const struct ath_bus_ops
*bus_ops)

{

                struct ath9k_platform_data *pdata = sc->dev->platform_data;

                struct ath_hw *ah = NULL;

                struct ath9k_hw_capabilities *pCap;

                struct ath_common *common;

                int ret = 0, i;

                int csz = 0;

 

                ah = devm_kzalloc(sc->dev, sizeof(struct ath_hw),
GFP_KERNEL);

                if (!ah)

                                return -ENOMEM;

 

                ah->dev = sc->dev;

                ah->hw = sc->hw;

                ah->hw_version.devid = devid;

                ah->reg_ops.read = ath9k_ioread32;

                ah->reg_ops.write = ath9k_iowrite32;

                ah->reg_ops.rmw = ath9k_reg_rmw;

                pCap = &ah->caps;

 

                common = ath9k_hw_common(ah);

 

                /* Will be cleared in ath9k_start() */

                set_bit(ATH_OP_INVALID, &common->op_flags);

 

                sc->sc_ah = ah;

                sc->dfs_detector = dfs_pattern_detector_init(common,
NL80211_DFS_UNSET);

                sc->tx99_power = MAX_RATE_POWER + 1;

                init_waitqueue_head(&sc->tx_wait);

                sc->cur_chan = &sc->chanctx[0];

                if (!ath9k_is_chanctx_enabled())

                                sc->cur_chan->hw_queue_base = 0;

 

                if (!pdata || pdata->use_eeprom) {

                                ah->ah_flags |= AH_USE_EEPROM;

                                sc->sc_ah->led_pin = -1;

                } else {

                                sc->sc_ah->gpio_mask = pdata->gpio_mask;

                                sc->sc_ah->gpio_val = pdata->gpio_val;

                                sc->sc_ah->led_pin = pdata->led_pin;

                                ah->is_clk_25mhz = pdata->is_clk_25mhz;

                                ah->get_mac_revision =
pdata->get_mac_revision;

                                ah->external_reset = pdata->external_reset;

                                ah->disable_2ghz = pdata->disable_2ghz;

                                ah->disable_5ghz = pdata->disable_5ghz;

                                if (!pdata->endian_check)

                                                ah->ah_flags |=
AH_NO_EEP_SWAP;

                }

 

                common->ops = &ah->reg_ops;

                common->bus_ops = bus_ops;

                common->ps_ops = &ath9k_ps_ops;

                common->ah = ah;

                common->hw = sc->hw;

                common->priv = sc;

                common->debug_mask = ath9k_debug;

                common->btcoex_enabled = ath9k_btcoex_enable == 1;

                common->disable_ani = false;

/////////////////////////////////////////////////////

Thanks

 

Best Regards, 

 

Melvin Chow

 

sig

Elecom Electronics Supply

ABN: 15 457 351 181

Tel AU: +61 3 9790 6259

Mobile: +61 468 468 128

Email:  <mailto:melvinc@elecomes.com> mailto:melvinc at elecomes.com

Web:  <http://www.elecomes.com/> http://www.elecomes.com

 

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