diff for duplicates of <002601dab23c$559263d0$00b72b70$@samsung.com>

diff --git a/a/1.txt b/N1/1.txt
index 5f778dc..e744135 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -48,77 +48,85 @@ Hi Vishnu,
 > +	data = readl(reg + type->reg_offset[PINCFG_TYPE_PUD]);
 > +	data &= ~(0xf << (offset * 4));
 For the mask, you can use "type->fld_width" as that is more generic and will work for all SoC
-I didn’t get, why you are multiplying offset with 4? Is this true for all SoC?\r
-\r
-> +	data |= value << (offset * 4);\r
-> +	writel(data, reg + type->reg_offset[PINCFG_TYPE_PUD]);\r
-> +}\r
-> +\r
-> +/*\r
-> + * samsung_gpio_set_config will identify the type of PUD config based\r
-> + * on the gpiolib request to enable or disable the PUD configuration.\r
-> + */\r
-> +static int samsung_gpio_set_config(struct gpio_chip *gc, unsigned int offset,\r
-> +				   unsigned long config)\r
-> +{\r
-> +	struct samsung_pin_bank *bank = gpiochip_get_data(gc);\r
-> +	unsigned long flags;\r
-> +	unsigned int value = 0;\r
-> +\r
-> +	switch (pinconf_to_config_param(config)) {\r
-> +	case PIN_CONFIG_BIAS_DISABLE:\r
-> +		value = DISABLE_PIN_PULL_UP_DOWN;\r
-> +		break;\r
-> +	case PIN_CONFIG_BIAS_PULL_DOWN:\r
-> +		value = ENABLE_PIN_PULL_DOWN;\r
-> +		break;\r
-> +	case PIN_CONFIG_BIAS_PULL_UP:\r
-> +		value = ENABLE_PIN_PULL_UP;\r
-> +		break;\r
-> +	default:\r
-> +		return -ENOTSUPP;\r
-> +	}\r
-> +\r
-> +	raw_spin_lock_irqsave(&bank->slock, flags);\r
-> +	samsung_gpio_set_pud(gc, offset, value);\r
-> +	raw_spin_unlock_irqrestore(&bank->slock, flags);\r
-> +	return 0;\r
-> +}\r
-> +\r
->  static const struct gpio_chip samsung_gpiolib_chip = {\r
->  	.request = gpiochip_generic_request,\r
->  	.free = gpiochip_generic_free,\r
-> @@ -948,6 +998,7 @@ static const struct gpio_chip samsung_gpiolib_chip = {\r
->  	.direction_output = samsung_gpio_direction_output,\r
->  	.to_irq = samsung_gpio_to_irq,\r
->  	.add_pin_ranges = samsung_add_pin_ranges,\r
-> +	.set_config = samsung_gpio_set_config,\r
->  	.owner = THIS_MODULE,\r
->  };\r
-> \r
-> diff --git a/drivers/pinctrl/samsung/pinctrl-samsung.h\r
-> b/drivers/pinctrl/samsung/pinctrl-samsung.h\r
-> index ab791afaabf5..23b70ddcaccc 100644\r
-> --- a/drivers/pinctrl/samsung/pinctrl-samsung.h\r
-> +++ b/drivers/pinctrl/samsung/pinctrl-samsung.h\r
-> @@ -61,6 +61,13 @@ enum pincfg_type {\r
->  #define PIN_CON_FUNC_INPUT		0x0\r
->  #define PIN_CON_FUNC_OUTPUT		0x1\r
-> \r
-> +/*\r
-> + * Values for the pin PUD register.\r
-> + */\r
-> +#define DISABLE_PIN_PULL_UP_DOWN	0x0\r
-> +#define ENABLE_PIN_PULL_DOWN		0x1\r
-> +#define ENABLE_PIN_PULL_UP		0x3\r
-Use consistent naming conventions as per this file, so \r
-PIN_PUD_PULL_UP_DOWN_DISABLE\r
-PIN_PUD_PULL_DOWN_ENABLE\r
-PIN_PUD_PULL_UP_ENABLE\r
-\r
-> +\r
->  /**\r
->   * enum eint_type - possible external interrupt types.\r
->   * @EINT_TYPE_NONE: bank does not support external interrupts\r
-> --\r
+I didn’t get, why you are multiplying offset with 4? Is this true for all SoC?
+
+> +	data |= value << (offset * 4);
+> +	writel(data, reg + type->reg_offset[PINCFG_TYPE_PUD]);
+> +}
+> +
+> +/*
+> + * samsung_gpio_set_config will identify the type of PUD config based
+> + * on the gpiolib request to enable or disable the PUD configuration.
+> + */
+> +static int samsung_gpio_set_config(struct gpio_chip *gc, unsigned int offset,
+> +				   unsigned long config)
+> +{
+> +	struct samsung_pin_bank *bank = gpiochip_get_data(gc);
+> +	unsigned long flags;
+> +	unsigned int value = 0;
+> +
+> +	switch (pinconf_to_config_param(config)) {
+> +	case PIN_CONFIG_BIAS_DISABLE:
+> +		value = DISABLE_PIN_PULL_UP_DOWN;
+> +		break;
+> +	case PIN_CONFIG_BIAS_PULL_DOWN:
+> +		value = ENABLE_PIN_PULL_DOWN;
+> +		break;
+> +	case PIN_CONFIG_BIAS_PULL_UP:
+> +		value = ENABLE_PIN_PULL_UP;
+> +		break;
+> +	default:
+> +		return -ENOTSUPP;
+> +	}
+> +
+> +	raw_spin_lock_irqsave(&bank->slock, flags);
+> +	samsung_gpio_set_pud(gc, offset, value);
+> +	raw_spin_unlock_irqrestore(&bank->slock, flags);
+> +	return 0;
+> +}
+> +
+>  static const struct gpio_chip samsung_gpiolib_chip = {
+>  	.request = gpiochip_generic_request,
+>  	.free = gpiochip_generic_free,
+> @@ -948,6 +998,7 @@ static const struct gpio_chip samsung_gpiolib_chip = {
+>  	.direction_output = samsung_gpio_direction_output,
+>  	.to_irq = samsung_gpio_to_irq,
+>  	.add_pin_ranges = samsung_add_pin_ranges,
+> +	.set_config = samsung_gpio_set_config,
+>  	.owner = THIS_MODULE,
+>  };
+> 
+> diff --git a/drivers/pinctrl/samsung/pinctrl-samsung.h
+> b/drivers/pinctrl/samsung/pinctrl-samsung.h
+> index ab791afaabf5..23b70ddcaccc 100644
+> --- a/drivers/pinctrl/samsung/pinctrl-samsung.h
+> +++ b/drivers/pinctrl/samsung/pinctrl-samsung.h
+> @@ -61,6 +61,13 @@ enum pincfg_type {
+>  #define PIN_CON_FUNC_INPUT		0x0
+>  #define PIN_CON_FUNC_OUTPUT		0x1
+> 
+> +/*
+> + * Values for the pin PUD register.
+> + */
+> +#define DISABLE_PIN_PULL_UP_DOWN	0x0
+> +#define ENABLE_PIN_PULL_DOWN		0x1
+> +#define ENABLE_PIN_PULL_UP		0x3
+Use consistent naming conventions as per this file, so 
+PIN_PUD_PULL_UP_DOWN_DISABLE
+PIN_PUD_PULL_DOWN_ENABLE
+PIN_PUD_PULL_UP_ENABLE
+
+> +
+>  /**
+>   * enum eint_type - possible external interrupt types.
+>   * @EINT_TYPE_NONE: bank does not support external interrupts
+> --
 > 2.17.1
+
+
+
+
+_______________________________________________
+linux-arm-kernel mailing list
+linux-arm-kernel@lists.infradead.org
+http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
diff --git a/a/content_digest b/N1/content_digest
index 69fee8b..8561e01 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -65,79 +65,87 @@
  "> +\tdata = readl(reg + type->reg_offset[PINCFG_TYPE_PUD]);\n"
  "> +\tdata &= ~(0xf << (offset * 4));\n"
  "For the mask, you can use \"type->fld_width\" as that is more generic and will work for all SoC\n"
- "I didn\342\200\231t get, why you are multiplying offset with 4? Is this true for all SoC?\r\n"
- "\r\n"
- "> +\tdata |= value << (offset * 4);\r\n"
- "> +\twritel(data, reg + type->reg_offset[PINCFG_TYPE_PUD]);\r\n"
- "> +}\r\n"
- "> +\r\n"
- "> +/*\r\n"
- "> + * samsung_gpio_set_config will identify the type of PUD config based\r\n"
- "> + * on the gpiolib request to enable or disable the PUD configuration.\r\n"
- "> + */\r\n"
- "> +static int samsung_gpio_set_config(struct gpio_chip *gc, unsigned int offset,\r\n"
- "> +\t\t\t\t   unsigned long config)\r\n"
- "> +{\r\n"
- "> +\tstruct samsung_pin_bank *bank = gpiochip_get_data(gc);\r\n"
- "> +\tunsigned long flags;\r\n"
- "> +\tunsigned int value = 0;\r\n"
- "> +\r\n"
- "> +\tswitch (pinconf_to_config_param(config)) {\r\n"
- "> +\tcase PIN_CONFIG_BIAS_DISABLE:\r\n"
- "> +\t\tvalue = DISABLE_PIN_PULL_UP_DOWN;\r\n"
- "> +\t\tbreak;\r\n"
- "> +\tcase PIN_CONFIG_BIAS_PULL_DOWN:\r\n"
- "> +\t\tvalue = ENABLE_PIN_PULL_DOWN;\r\n"
- "> +\t\tbreak;\r\n"
- "> +\tcase PIN_CONFIG_BIAS_PULL_UP:\r\n"
- "> +\t\tvalue = ENABLE_PIN_PULL_UP;\r\n"
- "> +\t\tbreak;\r\n"
- "> +\tdefault:\r\n"
- "> +\t\treturn -ENOTSUPP;\r\n"
- "> +\t}\r\n"
- "> +\r\n"
- "> +\traw_spin_lock_irqsave(&bank->slock, flags);\r\n"
- "> +\tsamsung_gpio_set_pud(gc, offset, value);\r\n"
- "> +\traw_spin_unlock_irqrestore(&bank->slock, flags);\r\n"
- "> +\treturn 0;\r\n"
- "> +}\r\n"
- "> +\r\n"
- ">  static const struct gpio_chip samsung_gpiolib_chip = {\r\n"
- ">  \t.request = gpiochip_generic_request,\r\n"
- ">  \t.free = gpiochip_generic_free,\r\n"
- "> @@ -948,6 +998,7 @@ static const struct gpio_chip samsung_gpiolib_chip = {\r\n"
- ">  \t.direction_output = samsung_gpio_direction_output,\r\n"
- ">  \t.to_irq = samsung_gpio_to_irq,\r\n"
- ">  \t.add_pin_ranges = samsung_add_pin_ranges,\r\n"
- "> +\t.set_config = samsung_gpio_set_config,\r\n"
- ">  \t.owner = THIS_MODULE,\r\n"
- ">  };\r\n"
- "> \r\n"
- "> diff --git a/drivers/pinctrl/samsung/pinctrl-samsung.h\r\n"
- "> b/drivers/pinctrl/samsung/pinctrl-samsung.h\r\n"
- "> index ab791afaabf5..23b70ddcaccc 100644\r\n"
- "> --- a/drivers/pinctrl/samsung/pinctrl-samsung.h\r\n"
- "> +++ b/drivers/pinctrl/samsung/pinctrl-samsung.h\r\n"
- "> @@ -61,6 +61,13 @@ enum pincfg_type {\r\n"
- ">  #define PIN_CON_FUNC_INPUT\t\t0x0\r\n"
- ">  #define PIN_CON_FUNC_OUTPUT\t\t0x1\r\n"
- "> \r\n"
- "> +/*\r\n"
- "> + * Values for the pin PUD register.\r\n"
- "> + */\r\n"
- "> +#define DISABLE_PIN_PULL_UP_DOWN\t0x0\r\n"
- "> +#define ENABLE_PIN_PULL_DOWN\t\t0x1\r\n"
- "> +#define ENABLE_PIN_PULL_UP\t\t0x3\r\n"
- "Use consistent naming conventions as per this file, so \r\n"
- "PIN_PUD_PULL_UP_DOWN_DISABLE\r\n"
- "PIN_PUD_PULL_DOWN_ENABLE\r\n"
- "PIN_PUD_PULL_UP_ENABLE\r\n"
- "\r\n"
- "> +\r\n"
- ">  /**\r\n"
- ">   * enum eint_type - possible external interrupt types.\r\n"
- ">   * @EINT_TYPE_NONE: bank does not support external interrupts\r\n"
- "> --\r\n"
- > 2.17.1
+ "I didn\342\200\231t get, why you are multiplying offset with 4? Is this true for all SoC?\n"
+ "\n"
+ "> +\tdata |= value << (offset * 4);\n"
+ "> +\twritel(data, reg + type->reg_offset[PINCFG_TYPE_PUD]);\n"
+ "> +}\n"
+ "> +\n"
+ "> +/*\n"
+ "> + * samsung_gpio_set_config will identify the type of PUD config based\n"
+ "> + * on the gpiolib request to enable or disable the PUD configuration.\n"
+ "> + */\n"
+ "> +static int samsung_gpio_set_config(struct gpio_chip *gc, unsigned int offset,\n"
+ "> +\t\t\t\t   unsigned long config)\n"
+ "> +{\n"
+ "> +\tstruct samsung_pin_bank *bank = gpiochip_get_data(gc);\n"
+ "> +\tunsigned long flags;\n"
+ "> +\tunsigned int value = 0;\n"
+ "> +\n"
+ "> +\tswitch (pinconf_to_config_param(config)) {\n"
+ "> +\tcase PIN_CONFIG_BIAS_DISABLE:\n"
+ "> +\t\tvalue = DISABLE_PIN_PULL_UP_DOWN;\n"
+ "> +\t\tbreak;\n"
+ "> +\tcase PIN_CONFIG_BIAS_PULL_DOWN:\n"
+ "> +\t\tvalue = ENABLE_PIN_PULL_DOWN;\n"
+ "> +\t\tbreak;\n"
+ "> +\tcase PIN_CONFIG_BIAS_PULL_UP:\n"
+ "> +\t\tvalue = ENABLE_PIN_PULL_UP;\n"
+ "> +\t\tbreak;\n"
+ "> +\tdefault:\n"
+ "> +\t\treturn -ENOTSUPP;\n"
+ "> +\t}\n"
+ "> +\n"
+ "> +\traw_spin_lock_irqsave(&bank->slock, flags);\n"
+ "> +\tsamsung_gpio_set_pud(gc, offset, value);\n"
+ "> +\traw_spin_unlock_irqrestore(&bank->slock, flags);\n"
+ "> +\treturn 0;\n"
+ "> +}\n"
+ "> +\n"
+ ">  static const struct gpio_chip samsung_gpiolib_chip = {\n"
+ ">  \t.request = gpiochip_generic_request,\n"
+ ">  \t.free = gpiochip_generic_free,\n"
+ "> @@ -948,6 +998,7 @@ static const struct gpio_chip samsung_gpiolib_chip = {\n"
+ ">  \t.direction_output = samsung_gpio_direction_output,\n"
+ ">  \t.to_irq = samsung_gpio_to_irq,\n"
+ ">  \t.add_pin_ranges = samsung_add_pin_ranges,\n"
+ "> +\t.set_config = samsung_gpio_set_config,\n"
+ ">  \t.owner = THIS_MODULE,\n"
+ ">  };\n"
+ "> \n"
+ "> diff --git a/drivers/pinctrl/samsung/pinctrl-samsung.h\n"
+ "> b/drivers/pinctrl/samsung/pinctrl-samsung.h\n"
+ "> index ab791afaabf5..23b70ddcaccc 100644\n"
+ "> --- a/drivers/pinctrl/samsung/pinctrl-samsung.h\n"
+ "> +++ b/drivers/pinctrl/samsung/pinctrl-samsung.h\n"
+ "> @@ -61,6 +61,13 @@ enum pincfg_type {\n"
+ ">  #define PIN_CON_FUNC_INPUT\t\t0x0\n"
+ ">  #define PIN_CON_FUNC_OUTPUT\t\t0x1\n"
+ "> \n"
+ "> +/*\n"
+ "> + * Values for the pin PUD register.\n"
+ "> + */\n"
+ "> +#define DISABLE_PIN_PULL_UP_DOWN\t0x0\n"
+ "> +#define ENABLE_PIN_PULL_DOWN\t\t0x1\n"
+ "> +#define ENABLE_PIN_PULL_UP\t\t0x3\n"
+ "Use consistent naming conventions as per this file, so \n"
+ "PIN_PUD_PULL_UP_DOWN_DISABLE\n"
+ "PIN_PUD_PULL_DOWN_ENABLE\n"
+ "PIN_PUD_PULL_UP_ENABLE\n"
+ "\n"
+ "> +\n"
+ ">  /**\n"
+ ">   * enum eint_type - possible external interrupt types.\n"
+ ">   * @EINT_TYPE_NONE: bank does not support external interrupts\n"
+ "> --\n"
+ "> 2.17.1\n"
+ "\n"
+ "\n"
+ "\n"
+ "\n"
+ "_______________________________________________\n"
+ "linux-arm-kernel mailing list\n"
+ "linux-arm-kernel@lists.infradead.org\n"
+ http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
 
-63cf7ca3037ee3d6ec36a17ed2a0880aafc6813cc63098a3d203b551d6a971b6
+b3f15b0184ebb42e0c1538a9ea011be9e949ba3baaef4090f7d47186e2afd778
