From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:48925) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZJjVr-0000Ww-B6 for qemu-devel@nongnu.org; Mon, 27 Jul 2015 10:36:20 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZJjVh-0003ZS-C6 for qemu-devel@nongnu.org; Mon, 27 Jul 2015 10:36:19 -0400 Received: from mailout3.w1.samsung.com ([210.118.77.13]:8494) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZJjVh-0003XM-6q for qemu-devel@nongnu.org; Mon, 27 Jul 2015 10:36:09 -0400 Received: from eucpsbgm2.samsung.com (unknown [203.254.199.245]) by mailout3.w1.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTP id <0NS500JDOHW8HT20@mailout3.w1.samsung.com> for qemu-devel@nongnu.org; Mon, 27 Jul 2015 15:36:08 +0100 (BST) From: Pavel Fedin References: <015a01d0c85c$b52b61d0$1f822570$@samsung.com> <20150727152658.3f3740f7@nial.brq.redhat.com> In-reply-to: <20150727152658.3f3740f7@nial.brq.redhat.com> Date: Mon, 27 Jul 2015 17:36:07 +0300 Message-id: <003401d0c879$937041b0$ba50c510$@samsung.com> MIME-version: 1.0 Content-type: text/plain; charset=us-ascii Content-transfer-encoding: 7bit Content-language: ru Subject: Re: [Qemu-devel] [PATCH v3] hw/arm/virt: Add high MMIO PCI region List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: 'Igor Mammedov' Cc: 'Peter Maydell' , 'Alexander Graf' , mst@redhat.com, 'QEMU Developers' , pbonzini@redhat.com Hello! > > + /* High MMIO space */ > > + mmio_alias = g_new0(MemoryRegion, 1); > > + memory_region_init_alias(mmio_alias, OBJECT(dev), "pcie-mmio-high", > > + mmio_reg, base_mmio_high, size_mmio_high); > > + memory_region_add_subregion(get_system_memory(), base_mmio_high, mmio_alias); > Is there any specific reason to have 2 separate regions vs using 1 like in > pc_pci_as_mapping_init() > using region priority instead of splitting. Unfortunately i'm not familiar very well with qemu memory internals. I saw PC code and i know that it adds PCI region of the size of the whole memory, then adds other things as overlapped regions. But wouldn't it be some resource waste in this case? I understand that in PC absolutely all "unused" addresses fall through to PCI, so that any device can plug in there. On ARM this is different, PCI controller is not a core of the system, it's just one of devices instead. And on our case a huge part of PCI region between VIRT_PCIE_MMIO and VIRT_PCIE_MMIO_HIGH would never be used. Does it worth that ? Kind regards, Pavel Fedin Expert Engineer Samsung Electronics Research center Russia