From mboxrd@z Thu Jan  1 00:00:00 1970
From: Michal Simek <monstr@seznam.cz>
Date: Sat, 21 Apr 2007 21:28:59 +0200
Subject: [U-Boot-Users] SystemACE
Message-ID: <005d01c7844b$4fb8e740$0200a8c0@monstrone>
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To: u-boot@lists.denx.de

Hi,
I have debugged systemace driver and ported it on Microblaze. I use 
SystemACE for loading bitstream to FPGA. But if the SystemACE initializes 
FPGA this part of code sets to zero CFGDONE bit in STATUSREG. And then 
release_cf_lock function resets SystemACE.
I add this part of code to microblaze-git repository. Please test it if you 
can.

Best regards,
Michal Simek

+/*
+ * For FPGA configuration via SystemACE is reset unacceptable
+ * CFGDONE bit in STATUSREG is not set to 1.
+ */

+#ifndef SYSTEMACE_CONFIG_FPGA
                /* Reset the configruation controller */
                val = ace_readw(0x18);
                val |= 0x0080;
                ace_writew(val, 0x18);
+#endif

                retry = trans * 16;
                while (retry > 0) {