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[54.240.197.239]) by smtp.gmail.com with ESMTPSA id k12sm2566312wrn.39.2020.09.30.05.09.21 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Wed, 30 Sep 2020 05:09:22 -0700 (PDT) From: Paul Durrant X-Google-Original-From: "Paul Durrant" Reply-To: To: "'Roger Pau Monne'" , Cc: "'Jan Beulich'" , "'Andrew Cooper'" , "'Wei Liu'" References: <20200930104108.35969-1-roger.pau@citrix.com> <20200930104108.35969-6-roger.pau@citrix.com> In-Reply-To: <20200930104108.35969-6-roger.pau@citrix.com> Subject: RE: [PATCH v2 05/11] x86/vioapic: switch to use the EOI callback mechanism Date: Wed, 30 Sep 2020 13:09:21 +0100 Message-ID: <007501d69722$88272f80$98758e80$@xen.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Mailer: Microsoft Outlook 16.0 Content-Language: en-gb Thread-Index: AQFWh0BMRanGT2UHRfj8GGEV+vuDtQI9scK1qm9HqMA= > -----Original Message----- > From: Xen-devel On Behalf Of = Roger Pau Monne > Sent: 30 September 2020 11:41 > To: xen-devel@lists.xenproject.org > Cc: Roger Pau Monne ; Jan Beulich = ; Andrew Cooper > ; Wei Liu > Subject: [PATCH v2 05/11] x86/vioapic: switch to use the EOI callback = mechanism >=20 > Switch the emulated IO-APIC code to use the local APIC EOI callback > mechanism. This allows to remove the last hardcoded callback from > vlapic_handle_EOI. Removing the hardcoded vIO-APIC callback also > allows to getting rid of setting the EOI exit bitmap based on the > triggering mode, as now all users that require an EOI action use the > newly introduced callback mechanism. >=20 > Move and rename the vioapic_update_EOI now that it can be made static. >=20 > Signed-off-by: Roger Pau Monn=C3=A9 > --- > Changes since v1: > - Remove the triggering check in the update_eoi_exit_bitmap call. > - Register the vlapic callbacks when loading the vIO-APIC state. > - Reduce scope of ent. > --- > xen/arch/x86/hvm/vioapic.c | 131 = ++++++++++++++++++++++++------------- > xen/arch/x86/hvm/vlapic.c | 5 +- > 2 files changed, 86 insertions(+), 50 deletions(-) >=20 > diff --git a/xen/arch/x86/hvm/vioapic.c b/xen/arch/x86/hvm/vioapic.c > index 752fc410db..dce98b1479 100644 > --- a/xen/arch/x86/hvm/vioapic.c > +++ b/xen/arch/x86/hvm/vioapic.c > @@ -375,6 +375,50 @@ static const struct hvm_mmio_ops vioapic_mmio_ops = =3D { > .write =3D vioapic_write > }; >=20 > +static void eoi_callback(unsigned int vector, void *data) > +{ > + struct domain *d =3D current->domain; > + struct hvm_irq *hvm_irq =3D hvm_domain_irq(d); > + unsigned int i; > + > + ASSERT(has_vioapic(d)); > + > + spin_lock(&d->arch.hvm.irq_lock); > + > + for ( i =3D 0; i < d->arch.hvm.nr_vioapics; i++ ) > + { > + struct hvm_vioapic *vioapic =3D domain_vioapic(d, i); > + unsigned int pin; > + > + for ( pin =3D 0; pin < vioapic->nr_pins; pin++ ) > + { > + union vioapic_redir_entry *ent =3D = &vioapic->redirtbl[pin]; > + > + if ( ent->fields.vector !=3D vector ) > + continue; > + > + ent->fields.remote_irr =3D 0; > + > + if ( is_iommu_enabled(d) ) > + { > + spin_unlock(&d->arch.hvm.irq_lock); > + hvm_dpci_eoi(vioapic->base_gsi + pin, ent); > + spin_lock(&d->arch.hvm.irq_lock); Is this safe? If so, why lock around the whole loop in the first place? Paul > + } > + > + if ( (ent->fields.trig_mode =3D=3D VIOAPIC_LEVEL_TRIG) && > + !ent->fields.mask && > + hvm_irq->gsi_assert_count[vioapic->base_gsi + pin] ) > + { > + ent->fields.remote_irr =3D 1; > + vioapic_deliver(vioapic, pin); > + } > + } > + } > + > + spin_unlock(&d->arch.hvm.irq_lock); > +} > + > static void ioapic_inj_irq( > struct hvm_vioapic *vioapic, > struct vlapic *target, > @@ -388,7 +432,8 @@ static void ioapic_inj_irq( > ASSERT((delivery_mode =3D=3D dest_Fixed) || > (delivery_mode =3D=3D dest_LowestPrio)); >=20 > - vlapic_set_irq(target, vector, trig_mode); > + vlapic_set_irq_callback(target, vector, trig_mode, > + trig_mode ? eoi_callback : NULL, NULL); > } >=20 > static void vioapic_deliver(struct hvm_vioapic *vioapic, unsigned int = pin) > @@ -495,50 +540,6 @@ void vioapic_irq_positive_edge(struct domain *d, = unsigned int irq) > } > } >=20 > -void vioapic_update_EOI(unsigned int vector) > -{ > - struct domain *d =3D current->domain; > - struct hvm_irq *hvm_irq =3D hvm_domain_irq(d); > - union vioapic_redir_entry *ent; > - unsigned int i; > - > - ASSERT(has_vioapic(d)); > - > - spin_lock(&d->arch.hvm.irq_lock); > - > - for ( i =3D 0; i < d->arch.hvm.nr_vioapics; i++ ) > - { > - struct hvm_vioapic *vioapic =3D domain_vioapic(d, i); > - unsigned int pin; > - > - for ( pin =3D 0; pin < vioapic->nr_pins; pin++ ) > - { > - ent =3D &vioapic->redirtbl[pin]; > - if ( ent->fields.vector !=3D vector ) > - continue; > - > - ent->fields.remote_irr =3D 0; > - > - if ( is_iommu_enabled(d) ) > - { > - spin_unlock(&d->arch.hvm.irq_lock); > - hvm_dpci_eoi(vioapic->base_gsi + pin, ent); > - spin_lock(&d->arch.hvm.irq_lock); > - } > - > - if ( (ent->fields.trig_mode =3D=3D VIOAPIC_LEVEL_TRIG) && > - !ent->fields.mask && > - hvm_irq->gsi_assert_count[vioapic->base_gsi + pin] ) > - { > - ent->fields.remote_irr =3D 1; > - vioapic_deliver(vioapic, pin); > - } > - } > - } > - > - spin_unlock(&d->arch.hvm.irq_lock); > -} > - > int vioapic_get_mask(const struct domain *d, unsigned int gsi) > { > unsigned int pin =3D 0; /* See gsi_vioapic */ > @@ -592,6 +593,8 @@ static int ioapic_save(struct vcpu *v, = hvm_domain_context_t *h) > static int ioapic_load(struct domain *d, hvm_domain_context_t *h) > { > struct hvm_vioapic *s; > + unsigned int i; > + int rc; >=20 > if ( !has_vioapic(d) ) > return -ENODEV; > @@ -602,7 +605,43 @@ static int ioapic_load(struct domain *d, = hvm_domain_context_t *h) > d->arch.hvm.nr_vioapics !=3D 1 ) > return -EOPNOTSUPP; >=20 > - return hvm_load_entry(IOAPIC, h, &s->domU); > + rc =3D hvm_load_entry(IOAPIC, h, &s->domU); > + if ( rc ) > + return rc; > + > + for ( i =3D 0; i < ARRAY_SIZE(s->domU.redirtbl); i++ ) > + { > + const union vioapic_redir_entry *ent =3D = &s->domU.redirtbl[i]; > + unsigned int vector =3D ent->fields.vector; > + unsigned int delivery_mode =3D ent->fields.delivery_mode; > + struct vcpu *v; > + > + /* > + * Add a callback for each possible vector injected by a = redirection > + * entry. > + */ > + if ( vector < 16 || !ent->fields.remote_irr || > + (delivery_mode !=3D dest_LowestPrio && delivery_mode = !=3D dest_Fixed) ) > + continue; > + > + for_each_vcpu ( d, v ) > + { > + struct vlapic *vlapic =3D vcpu_vlapic(v); > + > + /* > + * NB: if the vlapic registers where restored before the = vio-apic > + * ones we could test whether the vector is set in the = vlapic IRR > + * or ISR registers before unconditionally setting the = callback. > + * This is harmless as eoi_callback is capable of dealing = with > + * spurious callbacks. > + */ > + if ( vlapic_match_dest(vlapic, NULL, 0, = ent->fields.dest_id, > + ent->fields.dest_mode) ) > + vlapic_set_callback(vlapic, vector, eoi_callback, = NULL); > + } > + } > + > + return 0; > } >=20 > HVM_REGISTER_SAVE_RESTORE(IOAPIC, ioapic_save, ioapic_load, 1, = HVMSR_PER_DOM); > diff --git a/xen/arch/x86/hvm/vlapic.c b/xen/arch/x86/hvm/vlapic.c > index 8a18b33428..35f12e0909 100644 > --- a/xen/arch/x86/hvm/vlapic.c > +++ b/xen/arch/x86/hvm/vlapic.c > @@ -189,7 +189,7 @@ void vlapic_set_irq_callback(struct vlapic = *vlapic, uint8_t vec, uint8_t trig, >=20 > if ( hvm_funcs.update_eoi_exit_bitmap ) > alternative_vcall(hvm_funcs.update_eoi_exit_bitmap, target, = vec, > - trig || callback); > + callback); >=20 > if ( hvm_funcs.deliver_posted_intr ) > alternative_vcall(hvm_funcs.deliver_posted_intr, target, = vec); > @@ -493,9 +493,6 @@ void vlapic_handle_EOI(struct vlapic *vlapic, u8 = vector) > unsigned long flags; > unsigned int index =3D vector - 16; >=20 > - if ( vlapic_test_vector(vector, &vlapic->regs->data[APIC_TMR]) ) > - vioapic_update_EOI(vector); > - > spin_lock_irqsave(&vlapic->callback_lock, flags); > callback =3D vlapic->callbacks[index].callback; > vlapic->callbacks[index].callback =3D NULL; > -- > 2.28.0 >=20