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charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.52.3 (3.52.3-1.fc40app2) MIME-Version: 1.0 Hi Julien, On Sun, 2024-07-21 at 09:51 +0100, Julien Grall wrote: > Hi Oleksii, >=20 > On 12/07/2024 17:22, Oleksii Kurochko wrote: > > Introduces arch_pmap_{un}map functions and select HAS_PMAP > > for CONFIG_RISCV. > >=20 > > Additionaly it was necessary to introduce functions: > > =C2=A0 - mfn_to_xen_entry > > =C2=A0 - mfn_to_pte > >=20 > > Signed-off-by: Oleksii Kurochko > > --- > > Changes in V2: > > =C2=A0 - newly introduced patch > > --- > > =C2=A0 xen/arch/riscv/Kconfig=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0 |=C2=A0 1 + > > =C2=A0 xen/arch/riscv/include/asm/page.h |=C2=A0 2 ++ > > =C2=A0 xen/arch/riscv/include/asm/pmap.h | 28 > > ++++++++++++++++++++++++++++ > > =C2=A0 xen/arch/riscv/mm.c=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 | 14 ++++++++++++++ > > =C2=A0 4 files changed, 45 insertions(+) > > =C2=A0 create mode 100644 xen/arch/riscv/include/asm/pmap.h > >=20 > > diff --git a/xen/arch/riscv/Kconfig b/xen/arch/riscv/Kconfig > > index 259eea8d3b..0112aa8778 100644 > > --- a/xen/arch/riscv/Kconfig > > +++ b/xen/arch/riscv/Kconfig > > @@ -3,6 +3,7 @@ config RISCV > > =C2=A0=C2=A0 select FUNCTION_ALIGNMENT_16B > > =C2=A0=C2=A0 select GENERIC_BUG_FRAME > > =C2=A0=C2=A0 select HAS_DEVICE_TREE > > + select HAS_PMAP > > =C2=A0=20 > > =C2=A0 config RISCV_64 > > =C2=A0=C2=A0 def_bool y > > diff --git a/xen/arch/riscv/include/asm/page.h > > b/xen/arch/riscv/include/asm/page.h > > index cbbf3656d1..339074d502 100644 > > --- a/xen/arch/riscv/include/asm/page.h > > +++ b/xen/arch/riscv/include/asm/page.h > > @@ -51,6 +51,8 @@ typedef struct { > > =C2=A0 #endif > > =C2=A0 } pte_t; > > =C2=A0=20 > > +pte_t mfn_to_xen_entry(mfn_t mfn, unsigned int attr); > > + > > =C2=A0 static inline pte_t paddr_to_pte(paddr_t paddr, > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 unsigned int p= ermissions) > > =C2=A0 { > > diff --git a/xen/arch/riscv/include/asm/pmap.h > > b/xen/arch/riscv/include/asm/pmap.h > > new file mode 100644 > > index 0000000000..eb4c48515c > > --- /dev/null > > +++ b/xen/arch/riscv/include/asm/pmap.h > > @@ -0,0 +1,28 @@ > > +#ifndef __ASM_PMAP_H__ > > +#define __ASM_PMAP_H__ > > + > > +#include > > +#include > > + > > +#include > > + > > +static inline void arch_pmap_map(unsigned int slot, mfn_t mfn) > > +{ > > +=C2=A0=C2=A0=C2=A0 pte_t *entry =3D &xen_fixmap[slot]; > > +=C2=A0=C2=A0=C2=A0 pte_t pte; > > + > > +=C2=A0=C2=A0=C2=A0 ASSERT(!pte_is_valid(*entry)); > > + > > +=C2=A0=C2=A0=C2=A0 pte =3D mfn_to_xen_entry(mfn, PAGE_HYPERVISOR_RW); > > +=C2=A0=C2=A0=C2=A0 pte.pte |=3D PTE_LEAF_DEFAULT; > > +=C2=A0=C2=A0=C2=A0 write_pte(entry, pte); > > +} > > + > > +static inline void arch_pmap_unmap(unsigned int slot) > > +{ > > +=C2=A0=C2=A0=C2=A0 pte_t pte =3D {}; > > + > > +=C2=A0=C2=A0=C2=A0 write_pte(&xen_fixmap[slot], pte); > > +} > > + > > +#endif /* __ASM_PMAP_H__ */ > > diff --git a/xen/arch/riscv/mm.c b/xen/arch/riscv/mm.c > > index d69a174b5d..445319af08 100644 > > --- a/xen/arch/riscv/mm.c > > +++ b/xen/arch/riscv/mm.c > > @@ -370,3 +370,17 @@ int map_pages_to_xen(unsigned long virt, > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 BUG_ON("unimplemented"); > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 return -1; > > =C2=A0 } > > + > > +static inline pte_t mfn_to_pte(mfn_t mfn) > > +{ > > +=C2=A0=C2=A0=C2=A0 unsigned long pte =3D mfn_x(mfn) << PTE_PPN_SHIFT; > > +=C2=A0=C2=A0=C2=A0 return (pte_t){ .pte =3D pte}; > > +} > > + > > +inline pte_t mfn_to_xen_entry(mfn_t mfn, unsigned int attr) > > +{ > > +=C2=A0=C2=A0=C2=A0 /* there is no attr field in RISC-V's pte */ > > +=C2=A0=C2=A0=C2=A0 (void) attr; >=20 > Surely you have a way to say indicate whether an entry is > readable/writable? Sure, there is a way. But probably I misinterpreted attr for Arm and decided not to use them here. By that I mean, that Arm has MT_NORMAL, MT_DEVICE which RISC-V doesn't have. If it is about readable/writable then for sure, I will start to use attr. ~ Oleksii >=20 > > + > > +=C2=A0=C2=A0=C2=A0 return mfn_to_pte(mfn); > > +} >=20 > Cheers, >=20