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From: Leonid Komarianskyi <Leonid_Komarianskyi@epam.com>
To: Julien Grall <julien@xen.org>,
	"xen-devel@lists.xenproject.org" <xen-devel@lists.xenproject.org>
Cc: "olekstysh@gmail.com" <olekstysh@gmail.com>,
	Stefano Stabellini <sstabellini@kernel.org>,
	Bertrand Marquis <bertrand.marquis@arm.com>,
	Michal Orzel <michal.orzel@amd.com>,
	Volodymyr Babchuk <Volodymyr_Babchuk@epam.com>
Subject: Re: [PATCH v7 04/12] xen/arm/irq: add handling for IRQs in the eSPI range
Date: Fri, 5 Sep 2025 10:05:33 +0000	[thread overview]
Message-ID: <00bfaf5c-c502-4792-a426-015f72dfc2db@epam.com> (raw)
In-Reply-To: <3a487f5c-0837-46b4-ad17-410a4a4bc78a@xen.org>

Hi Julien,

Thank you for your comment.

On 05.09.25 10:10, Julien Grall wrote:
> Hi Leonid,
> 
> On 04/09/2025 21:01, Leonid Komarianskyi wrote:
>> diff --git a/xen/arch/arm/include/asm/irq.h b/xen/arch/arm/include/ 
>> asm/irq.h
>> index 5bc6475eb4..2ff2d07d6d 100644
>> --- a/xen/arch/arm/include/asm/irq.h
>> +++ b/xen/arch/arm/include/asm/irq.h
>> @@ -32,6 +32,10 @@ struct arch_irq_desc {
>>   #define SPI_MAX_INTID   1019
>>   #define LPI_OFFSET      8192
>> +#define ESPI_BASE_INTID 4096
>> +#define ESPI_MAX_INTID  5119
>> +#define NR_ESPI_IRQS    1024
>> +
>>   /* LPIs are always numbered starting at 8192, so 0 is a good invalid 
>> case. */
>>   #define INVALID_LPI     0
>> @@ -39,7 +43,12 @@ struct arch_irq_desc {
>>   #define INVALID_IRQ     1023
>>   extern const unsigned int nr_irqs;
>> +#ifdef CONFIG_GICV3_ESPI
>> +/* This will cover the eSPI range, to allow asignmant of eSPIs to 
>> domains. */
> 
> Typo: s/asignmant/assignment/
> 
> [...]
> 
>> Unless INTIDs from the eSPI
>> + * range are mistakenly defined in Xen DTS when the appropriate 
>> config is
>> + * disabled, this function will not be reached because is_espi will 
>> return
>> + * false for non-eSPI INTIDs.
> 
> I am still confused with this paragraph. How is this function can be 
> reached if it is compiled out? Surely, if the DT is misconfigured, we 
> should get an error when trying to route the interrupt. No? If so, can 
> you point me to that code?
> 
> Cheers,
> 

Oh, sorry, the second part of the comment is redundant with the current 
implementation. It was correct when the function had an implementation 
and returned NULL. The correct comment is:

Defined as a prototype as it should not be called if 
CONFIG_GICV3_ESPI=n. Without CONFIG_GICV3_ESPI, the additional 1024 IRQ 
descriptors will not be defined, and thus, they cannot be used.

Should I prepare V8 with the comment fix, or can this be corrected on 
commit?

Best regards,
Leonid

  reply	other threads:[~2025-09-05 10:05 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-09-04 20:00 [PATCH v7 00/12] Introduce eSPI support Leonid Komarianskyi
2025-09-04 20:01 ` [PATCH v7 01/12] xen/arm: gicv3: refactor obtaining GIC addresses for common operations Leonid Komarianskyi
2025-09-04 20:01 ` [PATCH v7 02/12] xen/arm: gic: implement helper functions for INTID checks Leonid Komarianskyi
2025-09-04 20:01 ` [PATCH v7 03/12] xen/arm: vgic: implement helper functions for virq checks Leonid Komarianskyi
2025-09-04 20:01 ` [PATCH v7 04/12] xen/arm/irq: add handling for IRQs in the eSPI range Leonid Komarianskyi
2025-09-04 20:56   ` Volodymyr Babchuk
2025-09-05  7:10   ` Julien Grall
2025-09-05 10:05     ` Leonid Komarianskyi [this message]
2025-09-05 10:10       ` Julien Grall
2025-09-05 11:00   ` Oleksandr Tyshchenko
2025-09-04 20:01 ` [PATCH v7 05/12] xen/arm: gicv3: implement handling of GICv3.1 eSPI Leonid Komarianskyi
2025-09-05  7:22   ` Julien Grall
2025-09-05 10:27     ` Leonid Komarianskyi
2025-09-05 10:36       ` Julien Grall
2025-09-04 20:01 ` [PATCH v7 06/12] xen/arm/irq: allow eSPI processing in the gic_interrupt function Leonid Komarianskyi
2025-09-04 20:01 ` [PATCH v7 07/12] xen/arm: gicv3: modify ICH_LR_PHYSICAL_MASK to allow eSPI processing Leonid Komarianskyi
2025-09-05  7:23   ` Julien Grall
2025-09-04 20:01 ` [PATCH v7 08/12] xen/arm: vgic: add resource management for extended SPIs Leonid Komarianskyi
2025-09-04 20:58   ` Volodymyr Babchuk
2025-09-05  7:27   ` Julien Grall
2025-09-04 20:01 ` [PATCH v7 09/12] xen/arm: domain_build/dom0less-build: adjust domains config to support eSPIs Leonid Komarianskyi
2025-09-05  7:28   ` Julien Grall
2025-09-04 20:01 ` [PATCH v7 10/12] xen/arm: vgic-v3: add emulation of GICv3.1 eSPI registers Leonid Komarianskyi
2025-09-05  7:38   ` Julien Grall
2025-09-04 20:01 ` [PATCH v7 11/12] doc/man: update description for nr_spis with eSPI Leonid Komarianskyi
2025-09-04 20:01 ` [PATCH v7 12/12] CHANGELOG.md: add mention of GICv3.1 eSPI support Leonid Komarianskyi
2025-09-06  0:17 ` [PATCH v7 00/12] Introduce " Stefano Stabellini
2025-09-07 20:28   ` Leonid Komarianskyi
2025-09-09  0:10     ` Stefano Stabellini
2025-09-08 14:14   ` Oleksii Kurochko

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