From: "Chanho Park" <chanho61.park@samsung.com>
To: "'Heinrich Schuchardt'" <xypron.glpk@gmx.de>
Cc: "'Sughosh Ganu'" <sughosh.ganu@linaro.org>,
"'Rick Chen'" <rick@andestech.com>,
"'Leo'" <ycliang@andestech.com>, <u-boot@lists.denx.de>
Subject: RE: [PATCH 3/5] rng: Add StarFive JH7110 RNG driver
Date: Wed, 1 Nov 2023 08:12:40 +0900 [thread overview]
Message-ID: <010601da0c4f$bee10aa0$3ca31fe0$@samsung.com> (raw)
In-Reply-To: <ff82b420-6226-436f-9f95-01411eaa8289@gmx.de>
> -----Original Message-----
> From: Heinrich Schuchardt <xypron.glpk@gmx.de>
> Sent: Wednesday, November 1, 2023 6:18 AM
> To: Chanho Park <chanho61.park@samsung.com>
> Cc: Sughosh Ganu <sughosh.ganu@linaro.org>; Rick Chen <rick@andestech.com>;
> Leo <ycliang@andestech.com>; u-boot@lists.denx.de
> Subject: Re: [PATCH 3/5] rng: Add StarFive JH7110 RNG driver
>
> On 10/30/23 09:32, Chanho Park wrote:
> > Adds to support JH7110 TRNG driver which is based on linux kernel's
> > jh7110-trng.c. This can support to generate 256-bit random numbers and
> > 128-bit but this makes 256-bit default for convenience.
> >
> > Signed-off-by: Chanho Park <chanho61.park@samsung.com>
> > ---
> > drivers/rng/Kconfig | 6 +
> > drivers/rng/Makefile | 1 +
> > drivers/rng/jh7110_rng.c | 272 +++++++++++++++++++++++++++++++++++++++
> > 3 files changed, 279 insertions(+)
> > create mode 100644 drivers/rng/jh7110_rng.c
> >
> > diff --git a/drivers/rng/Kconfig b/drivers/rng/Kconfig
> > index 994cc35b2744..0dba1e06b429 100644
> > --- a/drivers/rng/Kconfig
> > +++ b/drivers/rng/Kconfig
> > @@ -91,4 +91,10 @@ config TPM_RNG
> > functionality. Enable random number generator on TPM
> > devices.
> >
> > +config RNG_JH7110
> > + bool "StarFive JH7110 Random Number Generator support"
> > + depends on DM_RNG && STARFIVE_JH7110
> > + help
> > + Enable True Random Number Generator in StarFive JH7110 SoCs.
> > +
> > endif
> > diff --git a/drivers/rng/Makefile b/drivers/rng/Makefile
> > index 47b323e61ee3..9de762c8a1c3 100644
> > --- a/drivers/rng/Makefile
> > +++ b/drivers/rng/Makefile
> > @@ -15,3 +15,4 @@ obj-$(CONFIG_RNG_IPROC200) += iproc_rng200.o
> > obj-$(CONFIG_RNG_SMCCC_TRNG) += smccc_trng.o
> > obj-$(CONFIG_RNG_ARM_RNDR) += arm_rndr.o
> > obj-$(CONFIG_TPM_RNG) += tpm_rng.o
> > +obj-$(CONFIG_RNG_JH7110) += jh7110_rng.o
> > diff --git a/drivers/rng/jh7110_rng.c b/drivers/rng/jh7110_rng.c
> > new file mode 100644
> > index 000000000000..e71bf188f017
> > --- /dev/null
> > +++ b/drivers/rng/jh7110_rng.c
> > @@ -0,0 +1,272 @@
> > +// SPDX-License-Identifier: GPL-2.0-or-later
> > +/*
> > + * TRNG driver for the StarFive JH7110 SoC
> > + *
> > + */
> > +
> > +#include <clk.h>
> > +#include <dm.h>
> > +#include <reset.h>
> > +#include <rng.h>
> > +#include <asm/io.h>
> > +#include <linux/iopoll.h>
> > +
> > +/* trng register offset */
> > +#define STARFIVE_CTRL 0x00
> > +#define STARFIVE_STAT 0x04
> > +#define STARFIVE_MODE 0x08
> > +#define STARFIVE_SMODE 0x0C
> > +#define STARFIVE_IE 0x10
> > +#define STARFIVE_ISTAT 0x14
> > +#define STARFIVE_RAND0 0x20
> > +#define STARFIVE_RAND1 0x24
> > +#define STARFIVE_RAND2 0x28
> > +#define STARFIVE_RAND3 0x2C
> > +#define STARFIVE_RAND4 0x30
> > +#define STARFIVE_RAND5 0x34
> > +#define STARFIVE_RAND6 0x38
> > +#define STARFIVE_RAND7 0x3C
> > +#define STARFIVE_AUTO_RQSTS 0x60
> > +#define STARFIVE_AUTO_AGE 0x64
> > +
> > +/* CTRL CMD */
> > +#define STARFIVE_CTRL_EXEC_NOP 0x0
> > +#define STARFIVE_CTRL_GENE_RANDNUM 0x1
> > +#define STARFIVE_CTRL_EXEC_RANDRESEED 0x2
> > +
> > +/* STAT */
> > +#define STARFIVE_STAT_NONCE_MODE BIT(2)
> > +#define STARFIVE_STAT_R256 BIT(3)
> > +#define STARFIVE_STAT_MISSION_MODE BIT(8)
> > +#define STARFIVE_STAT_SEEDED BIT(9)
> > +#define STARFIVE_STAT_LAST_RESEED(x) ((x) << 16)
> > +#define STARFIVE_STAT_SRVC_RQST BIT(27)
> > +#define STARFIVE_STAT_RAND_GENERATING BIT(30)
> > +#define STARFIVE_STAT_RAND_SEEDING BIT(31)
> > +#define STARFIVE_STAT_RUNNING (STARFIVE_STAT_RAND_GENERATING | \
> > + STARFIVE_STAT_RAND_SEEDING)
> > +
> > +/* MODE */
> > +#define STARFIVE_MODE_R256 BIT(3)
> > +
> > +/* SMODE */
> > +#define STARFIVE_SMODE_NONCE_MODE BIT(2)
> > +#define STARFIVE_SMODE_MISSION_MODE BIT(8)
> > +#define STARFIVE_SMODE_MAX_REJECTS(x) ((x) << 16)
> > +
> > +/* IE */
> > +#define STARFIVE_IE_RAND_RDY_EN BIT(0)
> > +#define STARFIVE_IE_SEED_DONE_EN BIT(1)
> > +#define STARFIVE_IE_LFSR_LOCKUP_EN BIT(4)
> > +#define STARFIVE_IE_GLBL_EN BIT(31)
> > +
> > +#define STARFIVE_IE_ALL (STARFIVE_IE_GLBL_EN | \
> > + STARFIVE_IE_RAND_RDY_EN | \
> > + STARFIVE_IE_SEED_DONE_EN | \
> > + STARFIVE_IE_LFSR_LOCKUP_EN)
> > +
> > +/* ISTAT */
> > +#define STARFIVE_ISTAT_RAND_RDY BIT(0)
> > +#define STARFIVE_ISTAT_SEED_DONE BIT(1)
> > +#define STARFIVE_ISTAT_LFSR_LOCKUP BIT(4)
> > +
> > +#define STARFIVE_RAND_LEN sizeof(u32)
> > +
> > +enum mode {
> > + PRNG_128BIT,
> > + PRNG_256BIT,
> > +};
> > +
> > +struct starfive_trng_plat {
> > + void *base;
> > + struct clk *hclk;
> > + struct clk *ahb;
> > + struct reset_ctl *rst;
> > + u32 mode;
> > +};
> > +
> > +static inline int starfive_trng_wait_idle(struct starfive_trng_plat
> *trng)
> > +{
> > + u32 stat;
> > +
> > + return readl_relaxed_poll_timeout(trng->base + STARFIVE_STAT, stat,
> > + !(stat & STARFIVE_STAT_RUNNING),
> > + 100000);
> > +}
> > +
> > +static inline void starfive_trng_irq_mask_clear(struct
> starfive_trng_plat *trng)
> > +{
> > + /* clear register: ISTAT */
> > + u32 data = readl(trng->base + STARFIVE_ISTAT);
> > +
> > + writel(data, trng->base + STARFIVE_ISTAT);
> > +}
> > +
> > +static int starfive_trng_cmd(struct starfive_trng_plat *trng, u32 cmd)
> > +{
> > + u32 stat, flg;
> > + int ret;
> > +
> > + switch (cmd) {
> > + case STARFIVE_CTRL_GENE_RANDNUM:
> > + writel(cmd, trng->base + STARFIVE_CTRL);
> > + flg = STARFIVE_ISTAT_RAND_RDY;
> > + break;
> > + case STARFIVE_CTRL_EXEC_RANDRESEED:
> > + writel(cmd, trng->base + STARFIVE_CTRL);
> > + flg = STARFIVE_ISTAT_SEED_DONE;
> > + break;
> > + default:
> > + return -EINVAL;
> > + }
> > +
> > + ret = readl_relaxed_poll_timeout(trng->base + STARFIVE_ISTAT, stat,
> > + (stat & flg), 1000);
> > + writel(flg, trng->base + STARFIVE_ISTAT);
> > +
> > + return ret;
> > +}
> > +
> > +static int starfive_trng_read(struct udevice *dev, void *data, size_t
> len)
> > +{
> > + struct starfive_trng_plat *trng = dev_get_plat(dev);
> > + char *buffer = (char *)data;
>
> Great to see a RNG driver for this SoC.
>
> The conversion is not needed in C and should be removed.
Thank you for your kind review.
I'll remove it in the next patch.
>
> > + int ret;
> > + size_t max;
> > +
> > + if (trng->mode == PRNG_256BIT)
> > + max = min_t(size_t, max, (STARFIVE_RAND_LEN * 8));
> > + else
> > + max = min_t(size_t, max, (STARFIVE_RAND_LEN * 4));
> > +
> > + ret = starfive_trng_wait_idle(trng);
> > + if (ret)
> > + return -ETIMEDOUT;
> > +
> > + while (len) {
> > + size_t max;
> > + u32 val, step;
>
> Variables should be defined in the loop where they are used.
> Use size_t for step as this is what memcpy() needs as argument.
>
> > +
> > + if (trng->mode == PRNG_256BIT)
>
> The arguments of this if-statement are not changed in the loop. We don't
> really need the variable max. The number of iterations would be enough:
>
> if (trng->mode == PRNG_256BIT)
> rounds = 8;
> else
> rounds = 4;
> while(len) {
>
> > + max = min_t(size_t, len, (STARFIVE_RAND_LEN * 8));
> > + else
> > + max = min_t(size_t, len, (STARFIVE_RAND_LEN * 4));
> > +
> > + ret = starfive_trng_cmd(trng, STARFIVE_CTRL_GENE_RANDNUM);
> > + if (ret)
> > + return ret;
> > +
> > + for (int i = 0; i < DIV_ROUND_UP(max, STARFIVE_RAND_LEN);
> i++) {
>
> You are decrementing max in the loop. So on every iteration
> DIV_ROUND_UP(max, STARFIVE_RAND_LEN) will result in different result. I
> don't believe this is intended.
>
> > + val = readl(trng->base + STARFIVE_RAND0 +
> > + (i * STARFIVE_RAND_LEN));
> > + step = (max >= STARFIVE_RAND_LEN) ?
> > + STARFIVE_RAND_LEN : max;
>
> Please, stay consistent in your style and use min_t().
>
> > + memcpy(buffer, &val, step);
> > +
> > + max -= step;
> > + buffer += step;
> > + len -= step;
> > + }
> > + }
> > +
> > + return 0;
> > +}
>
> The following code looks a bit easier to read:
>
> u8 *buffer = data;
> int iter_mask;
>
> if (trng->mode == PRNG_256BIT)
> iter_mask = 7;
> else
> iter_mask = 3;
>
> for (int i = 0; len; ++i, i &= iter_mask)
> u32 val;
> size_t step;
>
> if (!i) {
> int ret;
>
> ret = starfive_trng_wait_idle(trng);
> if (ret)
> return -ETIMEDOUT;
> }
> val = read_l(trng->base + STARFIVE_RAND0 +
> (i * STARFIVE_RAND_LEN));
> step = min_t(size_t, len, STARFIVE_RAND_LEN);
> memcpy (buffer, &val, step);
> len -= step;
> }
That's a good suggestion, so let's apply the code.
Best Regards,
Chanho Park
>
> Best regards
>
> Heinrich
>
> > +
> > +static int starfive_trng_init(struct starfive_trng_plat *trng)
> > +{
> > + u32 mode, intr = 0;
> > +
> > + /* setup Auto Request/Age register */
> > + writel(0, trng->base + STARFIVE_AUTO_AGE);
> > + writel(0, trng->base + STARFIVE_AUTO_RQSTS);
> > +
> > + /* clear register: ISTAT */
> > + starfive_trng_irq_mask_clear(trng);
> > +
> > + intr |= STARFIVE_IE_ALL;
> > + writel(intr, trng->base + STARFIVE_IE);
> > +
> > + mode = readl(trng->base + STARFIVE_MODE);
> > +
> > + switch (trng->mode) {
> > + case PRNG_128BIT:
> > + mode &= ~STARFIVE_MODE_R256;
> > + break;
> > + case PRNG_256BIT:
> > + mode |= STARFIVE_MODE_R256;
> > + break;
> > + default:
> > + mode |= STARFIVE_MODE_R256;
> > + break;
> > + }
> > +
> > + writel(mode, trng->base + STARFIVE_MODE);
> > +
> > + return starfive_trng_cmd(trng, STARFIVE_CTRL_EXEC_RANDRESEED);
> > +}
> > +
> > +static int starfive_trng_probe(struct udevice *dev)
> > +{
> > + struct starfive_trng_plat *pdata = dev_get_plat(dev);
> > + int err;
> > +
> > + err = clk_enable(pdata->hclk);
> > + if (err)
> > + return err;
> > +
> > + err = clk_enable(pdata->ahb);
> > + if (err)
> > + return err;
> > +
> > + err = reset_deassert(pdata->rst);
> > + if (err)
> > + return err;
> > +
> > + pdata->mode = PRNG_256BIT;
> > +
> > + return starfive_trng_init(pdata);
> > +}
> > +
> > +static int starfive_trng_of_to_plat(struct udevice *dev)
> > +{
> > + struct starfive_trng_plat *pdata = dev_get_plat(dev);
> > +
> > + pdata->base = (void *)dev_read_addr(dev);
> > + if (!pdata->base)
> > + return -ENODEV;
> > +
> > + pdata->hclk = devm_clk_get(dev, "hclk");
> > + if (IS_ERR(pdata->hclk))
> > + return -ENODEV;
> > +
> > + pdata->ahb = devm_clk_get(dev, "ahb");
> > + if (IS_ERR(pdata->ahb))
> > + return -ENODEV;
> > +
> > + pdata->rst = devm_reset_control_get(dev, NULL);
> > + if (IS_ERR(pdata->rst))
> > + return -ENODEV;
> > +
> > + return 0;
> > +}
> > +
> > +static const struct dm_rng_ops starfive_trng_ops = {
> > + .read = starfive_trng_read,
> > +};
> > +
> > +static const struct udevice_id starfive_trng_match[] = {
> > + {
> > + .compatible = "starfive,jh7110-trng",
> > + },
> > + {},
> > +};
> > +
> > +U_BOOT_DRIVER(starfive_trng) = {
> > + .name = "jh7110-trng",
> > + .id = UCLASS_RNG,
> > + .of_match = starfive_trng_match,
> > + .probe = starfive_trng_probe,
> > + .ops = &starfive_trng_ops,
> > + .plat_auto = sizeof(struct starfive_trng_plat),
> > + .of_to_plat = starfive_trng_of_to_plat,
> > +};
next prev parent reply other threads:[~2023-10-31 23:12 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CGME20231030073227epcas2p4f230c08383b49e4ae5bf879575c65732@epcas2p4.samsung.com>
2023-10-30 7:31 ` [PATCH 0/5] Add support for StarFive JH7110 TRNG driver Chanho Park
2023-10-30 7:32 ` [PATCH 1/5] riscv: import read/write_relaxed functions Chanho Park
2023-10-30 7:32 ` [PATCH 2/5] clk: starfive: jh7110: Add security clocks Chanho Park
2023-10-30 7:32 ` [PATCH 3/5] rng: Add StarFive JH7110 RNG driver Chanho Park
2023-10-31 21:17 ` Heinrich Schuchardt
2023-10-31 23:12 ` Chanho Park [this message]
2023-10-30 7:32 ` [PATCH 4/5] riscv: dts: jh7110: Add rng device tree node Chanho Park
2023-10-30 7:32 ` [PATCH 5/5] configs: visionfive2: Enable JH7110 RNG driver Chanho Park
2023-10-31 21:21 ` Heinrich Schuchardt
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to='010601da0c4f$bee10aa0$3ca31fe0$@samsung.com' \
--to=chanho61.park@samsung.com \
--cc=rick@andestech.com \
--cc=sughosh.ganu@linaro.org \
--cc=u-boot@lists.denx.de \
--cc=xypron.glpk@gmx.de \
--cc=ycliang@andestech.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.