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From: "Benjamin Walsh" <walsh.benj@gmail.com>
To: <linuxppc-embedded@ozlabs.org>
Subject: NMI and AMD8131/8111 on Maple board
Date: Mon, 24 Nov 2008 15:35:49 -0500	[thread overview]
Message-ID: <012201c94e74$3dbb55b0$e693e080@corp.ad.wrs.com> (raw)
In-Reply-To: <113760FDF39C3E40AAB8DE6E6C64D0A781B747@zch01exm26.fsl.freescale.net>

Hi all,

I've written EDAC support for the AMD8131/8111 chips that are present on a
Maple board (PPC970FX with IBM CPC925 memory controller/bridge), currently
running in poll mode. I am now trying to get this to work in interrupt mode.
These two chipsets have a feature that enables triggering an NMI when an
error is detected (PERR and SERR). How can this be hooked into the interrupt
system on a PPC board ?

>From what I understand from the doc for these chipsets, the NMI will
delivered as a HT message to the CPC925 on this board. What I don't get is
how will this be delivered to the CPU, and on what interrupt line ? The HT
message sent to the CPC925 is the following:

MT = NMI
TM = edge
DM = physical
INTRDEST = 'hFF (all)
VECTOR = 'h00 (does not matter)

Any help appreciated.

Thanks,
Ben

  parent reply	other threads:[~2008-11-24 20:35 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2008-11-24  3:24 USB Host support on mpc 8313 Joaquin Luna
2008-11-24  7:12 ` Li Yang
2008-11-24  7:37   ` Regarding MPC5200 Naveen Kumar
2008-11-24 14:50     ` Grant Likely
2008-11-24 18:56     ` Wolfgang Denk
2008-11-24 20:35   ` Benjamin Walsh [this message]
2008-11-25 10:16     ` NMI and AMD8131/8111 on Maple board tiejun.chen
2008-11-25 22:22       ` Benjamin Walsh
2008-11-30 20:47   ` USB Host support on mpc 8313 Joaquin Luna

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