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From: Pavel Fedin <p.fedin@samsung.com>
To: 'Vijay Kilari' <vijay.kilari@gmail.com>
Cc: kvmarm@lists.cs.columbia.edu
Subject: RE: KVM Live migration with GICv3
Date: Tue, 25 Aug 2015 14:27:11 +0300	[thread overview]
Message-ID: <013601d0df28$fcb635b0$f622a110$@samsung.com> (raw)
In-Reply-To: <CALicx6s4BOuHsP40r2zuqgiLh+Rx=e=UQvwV5_R7LJB9-dpkig@mail.gmail.com>

 Hello! Where are you? I'd like to take a look at your code.

Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia


> -----Original Message-----
> From: Vijay Kilari [mailto:vijay.kilari@gmail.com]
> Sent: Tuesday, August 11, 2015 6:16 PM
> To: Pavel Fedin
> Cc: kvmarm@lists.cs.columbia.edu; Christoffer Dall; Alex Bennée
> Subject: Re: KVM Live migration with GICv3
> 
> On Tue, Aug 11, 2015 at 12:11 PM, Pavel Fedin <p.fedin@samsung.com> wrote:
> >  Hello!
> >
> >>    I have prototyped Live migration with GICv3.
> >
> >  This is interesting of course, i will need this for my project too and i was also going to take a look at
> this later.
> >
> >> For this I have made following changes
> >>
> >> 1) Save and Restore of GICv3 registers in QEMU.
> >>     - For GICv2, QEMU is saving/restoring GICD, GICC  registers. For GICv3,
> >>      we have to save/restore GICD, GICR and ICC registers.
> >>      However ICC registers are system registers which cannot be
> >> accessed @ EL0 level (SRE=1). So these ICC registers should be
> >> accessed as mmio registers by QEMU, for this we have to add ioctl to
> >> access ICC @ EL1 level similar to GICC registers of GICv2.
> >
> >  Sorry, your description is a bit fuzzy. What ioctl's did you have to add and why?
> >  The kernel already has KVM_GET_ONE_REG and KVM_SET_ONE_REG ioctl's. And they can be used
> to access anything inside the VM, including system registers. I believe you would need only to
> implement handlers for GICv3 registers.
> 
> I mean CPU interface registers GICC* defined for vgicv2 under
> "vgic_cpu_ranges[]" in
> virt/kvm/arm/vgic-v2-emul.c needs to be saved and restored for vgicv3 as well.
> So to  access vgic_cpu_ranges[] for vgicv3, we need to register device
> for CPU registers space
> similar to gicv2 in QEMU for gicv3.
> 
> -----------------------------------------------------------------------------------------
>     memory_region_init_reservation(&s->cpuiomem[0], OBJECT(s),
>                                    "kvm-gic_cpu", 0x1000);
>     sysbus_init_mmio(sbd, &s->cpuiomem[0]);
>     kvm_arm_register_device(&s->cpuiomem[0],
>                             (KVM_ARM_DEVICE_VGIC_V3 << KVM_ARM_DEVICE_ID_SHIFT)
>                             | KVM_VGIC_V3_ADDR_TYPE_CPU,
>                             KVM_DEV_ARM_VGIC_GRP_ADDR,
>                             KVM_VGIC_V3_ADDR_TYPE_CPU,
>                             s->dev_fd);
> -------------------------------------------------------------------------------------------
> 
> Anyway, I will send RFC patches.
> 
> >
> >> Please provide your initial feedback.
> >
> >  Would be nice to take a look at patches.
> >
> >> I am attending KVM-forum next week @ Seattle. We can discuss there as well.
> >
> >  I would love to go there, and my company wanted to send me there. But it appears to be extremely
> difficult for a tech specialist from Russia to get a US visa. They are still considering me and the time is
> running out, so i'm unlikely to attend, unfortunately.
> >
> > Kind regards,
> > Pavel Fedin
> > Expert Engineer
> > Samsung Electronics Research center Russia
> >
> >

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  parent reply	other threads:[~2015-08-25 11:13 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-08-11  5:25 KVM Live migration with GICv3 Vijay Kilari
2015-08-11  6:41 ` Pavel Fedin
2015-08-11 15:15   ` Vijay Kilari
2015-08-11 15:24     ` Pavel Fedin
2015-08-12 16:17       ` Marc Zyngier
2015-08-12 16:33         ` Peter Maydell
2015-08-25 11:27     ` Pavel Fedin [this message]
2015-08-26 14:24       ` Vijay Kilari
2015-08-12 16:34 ` Marc Zyngier

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