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envelope-from=ltaylorsimpson@gmail.com; helo=mail-qk1-x731.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org > -----Original Message----- > From: Brian Cain > Sent: Friday, February 28, 2025 11:28 PM > To: qemu-devel@nongnu.org > Cc: brian.cain@oss.qualcomm.com; richard.henderson@linaro.org; > philmd@linaro.org; quic_mathbern@quicinc.com; ale@rev.ng; anjo@rev.ng; > quic_mliebel@quicinc.com; ltaylorsimpson@gmail.com; > alex.bennee@linaro.org; quic_mburton@quicinc.com; > sidneym@quicinc.com; Brian Cain > Subject: [PATCH 07/39] target/hexagon: Implement wait helper >=20 > From: Brian Cain >=20 > Signed-off-by: Brian Cain > --- > target/hexagon/cpu_helper.h | 1 + > target/hexagon/cpu_helper.c | 40 > +++++++++++++++++++++++++++++++++++++ > target/hexagon/op_helper.c | 6 +++++- > 3 files changed, 46 insertions(+), 1 deletion(-) >=20 > diff --git a/target/hexagon/cpu_helper.h b/target/hexagon/cpu_helper.h > index 95a0cc0788..e8d89d8526 100644 > --- a/target/hexagon/cpu_helper.h > +++ b/target/hexagon/cpu_helper.h > @@ -20,6 +20,7 @@ void clear_wait_mode(CPUHexagonState *env); void > hexagon_ssr_set_cause(CPUHexagonState *env, uint32_t cause); void > hexagon_start_threads(CPUHexagonState *env, uint32_t mask); void > hexagon_stop_thread(CPUHexagonState *env); > +void hexagon_wait_thread(CPUHexagonState *env, target_ulong PC); >=20 > static inline void arch_set_thread_reg(CPUHexagonState *env, uint32_t = reg, > uint32_t val) diff --git = a/target/hexagon/cpu_helper.c > b/target/hexagon/cpu_helper.c index 3e2364a7b0..e64568b9fc 100644 > --- a/target/hexagon/cpu_helper.c > +++ b/target/hexagon/cpu_helper.c > @@ -71,6 +71,46 @@ void > hexagon_set_sys_pcycle_count(CPUHexagonState *env, uint64_t cycles) > g_assert_not_reached(); > } >=20 > +static void set_wait_mode(CPUHexagonState *env) { > + g_assert(bql_locked()); > + > + const uint32_t modectl =3D arch_get_system_reg(env, > HEX_SREG_MODECTL); > + uint32_t thread_wait_mask =3D GET_FIELD(MODECTL_W, modectl); > + thread_wait_mask |=3D 0x1 << env->threadId; > + SET_SYSTEM_FIELD(env, HEX_SREG_MODECTL, MODECTL_W, > +thread_wait_mask); } > + > +void hexagon_wait_thread(CPUHexagonState *env, target_ulong PC) { > + g_assert(bql_locked()); > + > + if (qemu_loglevel_mask(LOG_GUEST_ERROR) && > + (env->k0_lock_state !=3D HEX_LOCK_UNLOCKED || > + env->tlb_lock_state !=3D HEX_LOCK_UNLOCKED)) { > + qemu_log("WARNING: executing wait() with acquired lock" > + "may lead to deadlock\n"); > + } > + g_assert(get_exe_mode(env) !=3D HEX_EXE_MODE_WAIT); > + > + CPUState *cs =3D env_cpu(env); > + /* > + * The addtion of cpu_has_work is borrowed from arm's wfi helper > + * and is critical for our stability > + */ > + if ((cs->exception_index !=3D HEX_EVENT_NONE) || > + (cpu_has_work(cs))) { > + qemu_log_mask(CPU_LOG_INT, > + "%s: thread %d skipping WAIT mode, have some work\n", > + __func__, env->threadId); > + return; > + } > + set_wait_mode(env); > + env->wait_next_pc =3D PC + 4; > + > + cpu_interrupt(cs, CPU_INTERRUPT_HALT); } > + Why not put this in op_helper.c? Otherwise Reviewed-by: Taylor Simpson