diff for duplicates of <033a420e14f090258e4c8f14b7ba89a7@codeaurora.org> diff --git a/a/1.txt b/N1/1.txt index 60821d8..f6a012a 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -38,14 +38,14 @@ On 2018-01-29 10:41, Sricharan R wrote: > + > + soc { -> + pcie0: pci@40000000 { +> + pcie0: pci at 40000000 { > + status = "disabled"; > + }; We can disable in base dtsi itself. > + -> + pinctrl@1000000 { +> + pinctrl at 1000000 { > + serial_1_pins: serial1_pinmux { > + mux { > + pins = "gpio8", "gpio9"; @@ -92,13 +92,13 @@ On 2018-01-29 10:41, Sricharan R wrote: > + }; > + }; > + -> + serial@78b0000 { +> + serial at 78b0000 { > + pinctrl-0 = <&serial_1_pins>; > + pinctrl-names = "default"; > + status = "ok"; > + }; > + -> + spi_0: spi@78b5000 { /* BLSP1 QUP1 */ +> + spi_0: spi at 78b5000 { /* BLSP1 QUP1 */ > + pinctrl-0 = <&spi_0_pins>; > + pinctrl-names = "default"; > + status = "ok"; diff --git a/a/content_digest b/N1/content_digest index 2d67f47..ce9f1b8 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,25 +1,9 @@ "ref\01517202689-14212-1-git-send-email-sricharan@codeaurora.org\0" "ref\01517202689-14212-13-git-send-email-sricharan@codeaurora.org\0" - "From\0Abhishek Sahu <absahu@codeaurora.org>\0" - "Subject\0Re: [PATCH 12/15] ARM: dts: ipq4019: Add qcom-ipq4019-ap.dk07.1-c2 board file\0" + "From\0absahu@codeaurora.org (Abhishek Sahu)\0" + "Subject\0[PATCH 12/15] ARM: dts: ipq4019: Add qcom-ipq4019-ap.dk07.1-c2 board file\0" "Date\0Sat, 03 Feb 2018 17:43:38 +0530\0" - "To\0Sricharan R <sricharan@codeaurora.org>\0" - "Cc\0robh+dt@kernel.org" - robh@kernel.org - mark.rutland@arm.com - linux@armlinux.org.uk - andy.gross@linaro.org - david.brown@linaro.org - catalin.marinas@arm.com - will.deacon@arm.com - sboyd@codeaurora.org - bjorn.andersson@linaro.org - devicetree@vger.kernel.org - linux-kernel@vger.kernel.org - linux-arm-kernel@lists.infradead.org - linux-arm-msm@vger.kernel.org - linux-soc@vger.kernel.org - " linux-arm-msm-owner@vger.kernel.org\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "On 2018-01-29 10:41, Sricharan R wrote:\n" @@ -62,14 +46,14 @@ "\n" "> +\n" "> +\tsoc {\n" - "> +\t\tpcie0: pci@40000000 {\n" + "> +\t\tpcie0: pci at 40000000 {\n" "> +\t\t\tstatus = \"disabled\";\n" "> +\t\t};\n" "\n" " We can disable in base dtsi itself.\n" "\n" "> +\n" - "> +\t\tpinctrl@1000000 {\n" + "> +\t\tpinctrl at 1000000 {\n" "> +\t\t\tserial_1_pins: serial1_pinmux {\n" "> +\t\t\t\tmux {\n" "> +\t\t\t\t\tpins = \"gpio8\", \"gpio9\";\n" @@ -116,13 +100,13 @@ "> +\t\t\t};\n" "> +\t\t};\n" "> +\n" - "> +\t\tserial@78b0000 {\n" + "> +\t\tserial at 78b0000 {\n" "> +\t\t\tpinctrl-0 = <&serial_1_pins>;\n" "> +\t\t\tpinctrl-names = \"default\";\n" "> +\t\t\tstatus = \"ok\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tspi_0: spi@78b5000 { /* BLSP1 QUP1 */\n" + "> +\t\tspi_0: spi at 78b5000 { /* BLSP1 QUP1 */\n" "> +\t\t\tpinctrl-0 = <&spi_0_pins>;\n" "> +\t\t\tpinctrl-names = \"default\";\n" "> +\t\t\tstatus = \"ok\";\n" @@ -148,4 +132,4 @@ "> +\t};\n" > +}; -81edde40aef7dca1d6f60f3424e4fef731b0ffe0f3fe1af828989aeae4cdff45 +0c7e82f1cce307136a6bc43128217f80f6e3d76720ab0c22aa9f567129022c6f
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