Re: [RESEND PATCH] perf/x86/intel: Fix unchecked MSR access error for Alder Lake N

[Andi Kleen <ak@linux.intel.com>]

>
> Checking X86_FEATURE_HYPERVISOR in the guest won't handle things like trying to
> run a non-hyrbid vCPU model on a hybrid CPU, because IIUC, the "is_hybrid()" is
> purely based on FMS, i.e. will be false if someone enumerates a big core vCPU on
> a hybrid CPU.
>
> So until KVM gets sane handling, shouldn't this be?
>
> diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c
> index f969410d0c90..0a8accfc3018 100644
> --- a/arch/x86/events/core.c
> +++ b/arch/x86/events/core.c
> @@ -2999,12 +2999,8 @@ void perf_get_x86_pmu_capability(struct x86_pmu_capability *cap)
>          }
>
>          cap->version            = x86_pmu.version;
> -       /*
> -        * KVM doesn't support the hybrid PMU yet.
> -        * Return the common value in global x86_pmu,
> -        * which available for all cores.
> -        */
> -       cap->num_counters_gp    = x86_pmu.num_counters;
> +       /* KVM doesn't support the hybrid PMU yet. */
> +       cap->num_counters_gp    = is_hybrid() ? 0 : x86_pmu.num_counters;

That's just the PMU. Arguably if you don't handle hybrid affinity you 
shouldn't report the hybrid bit ever to the guest. So need more than that.

But I guess Peter is concerned about the case when an old KVM is the 
host.  I think a short term workaround for that is fine, but I don't 
think it's a good idea to completely disable it since that will break 
future setups with correct hybrid hypervisor too. We already probe the 
PMU MSRs, can't we detect this case there too?

-Andi