From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from shelob.surriel.com (shelob.surriel.com [96.67.55.147]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id ECA93C74A44 for ; Tue, 14 Mar 2023 08:05:06 +0000 (UTC) Received: from localhost ([::1] helo=shelob.surriel.com) by shelob.surriel.com with esmtp (Exim 4.96) (envelope-from ) id 1pbzdR-0000JH-2M; Tue, 14 Mar 2023 04:03:53 -0400 Received: from mscreen.etri.re.kr ([129.254.9.16]) by shelob.surriel.com with esmtps (TLS1.2) tls TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA (Exim 4.96) (envelope-from ) id 1pbzdK-0000J0-1e for kernelnewbies@kernelnewbies.org; Tue, 14 Mar 2023 04:03:52 -0400 Received: from unknown (HELO send001-relay.gov-dooray.com) (211.180.235.152) by 129.254.9.16 with ESMTP; 14 Mar 2023 17:03:30 +0900 X-Original-SENDERIP: 211.180.235.152 X-Original-MAILFROM: ckim@etri.re.kr X-Original-RCPTTO: kernelnewbies@kernelnewbies.org Received: from [10.162.225.112] (HELO smtp002-imp.gov-dooray.com) ([10.162.225.112]) by send001-relay.gov-dooray.com with SMTP id bf18786a64102a52; Tue, 14 Mar 2023 17:03:30 +0900 DKIM-Signature: a=rsa-sha256; b=jRXZeFKz+N3np5SrlOE9CKLWADo5CN6GuO0rT7FupKQjWLEcLZL+wuE72bHOTVq2IbefMNabM9 pHM2+gc10TF71NTO72veFLFZ1c4+MXfoqk+4ktI0niA3n37CAMbm8ttw2Q6KulX5YXT4d1Dob8SP QAptitNrS4bc1jmmAd4CBbfxcoLnjtYB3XH0r/yiXq3pprwyDHH9pL9RnHctt1wzzqO0LUWEvJRn Q+nVlM/OIGnRnR6jhJPkNB7kMaVmPjHA50gT5cfsW9lxLlY/1yUbsvJCzParmt4IvolASae3DG1z mg1NtOS3ZxSZ3rqDgeh/LZBJq0AEWAIWxIDblSzA==; c=relaxed/relaxed; s=selector; d=dooray.com; v=1; bh=2beEnCfgYF0N77f019fmCNpWJVlGHIZXSs1uYWvnpQs=; h=From:To:Subject:Message-ID; Received: from [129.254.132.39] (HELO CHANKIMPC) ([129.254.132.39]) by smtp002-imp.gov-dooray.com with SMTP id c46e393b64102a52; Tue, 14 Mar 2023 17:03:30 +0900 From: "Chan Kim" To: =?windows-1257?Q?'Valdis_Kl=E7tnieks'?= References: <034901d955a7$50a377d0$f1ea6770$@etri.re.kr> <687742.1678770890@turing-police> In-Reply-To: <687742.1678770890@turing-police> Subject: RE: returned dma address value of dma_alloc_coherent, is it always in the lower 4GB range? Date: Tue, 14 Mar 2023 17:03:28 +0900 Message-ID: <043801d9564b$766e5b20$634b1160$@etri.re.kr> MIME-Version: 1.0 X-Mailer: Microsoft Outlook 16.0 Content-Language: ko Thread-Index: AQJw7umpB+WwZ5ehuRGQPui2EWMP+QEGVZQDrcJ8Z4A= Cc: kernelnewbies@kernelnewbies.org X-BeenThere: kernelnewbies@kernelnewbies.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Learn about the Linux kernel List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: kernelnewbies-bounces@kernelnewbies.org Hello Valdis, >-----Original Message----- >From: Valdis Kletnieks On Behalf Of Valdis Kl?tnieks >Sent: Tuesday, March 14, 2023 2:15 PM >To: Chan Kim >Cc: kernelnewbies@kernelnewbies.org >Subject: Re: returned dma address value of dma_alloc_coherent, is it always >in the lower 4GB range? > >On Mon, 13 Mar 2023 21:28:28 +0900, "Chan Kim" said: > >> which is 32-bit addressable. Even if the device indicates (via the >> DMA >> mask) >> that it may address the upper 32-bits, consistent allocation will only >> return > 32-bit addresses for DMA if the consistent DMA mask has been >> explicitly changed via dma_set_coherent_mask(). This is true of the >> dma_pool interface as well. >> ------------------------------ > >> By context I guess it returns the address in lower 32bit address range >> even it the coherent_dma_mask is set to some bigger value. > >No, you have that backwards. It's not "even if". It wil give you a 32-bit >address *UNLESS* the driver has called dma_set_coherent_mask() to set a >wider mask *and* the device indicates it supports more than 32 bit >addresses... I'm sorry but please allow me to ask one more time. 1. "The consistent DMA mapping interfaces, will by default return a DMA address which is 32-bit addressable." ==> so by default consistent dma mapping API returns 32-bit address, and this 32-bit address means dma address, not physical address. Am I correct? (because the dma address will be translated to physical address by the iommu anyway) 2. " Even if the device indicates (via the DMA mask) that it may address the upper 32-bits, consistent allocation will only return > 32-bit addresses for DMA if the consistent DMA mask has been explicitly changed via dma_set_coherent_mask(). This is true of the dma_pool interface as well." ==> So I now understand the first 'even if' is for streaming dma mask ('dma_mask' in the struct device), and the second 'if' is for the 'coherent_dma_mask' in the struct device. And when coherent_dma_mask is not set, by default, the coherent mapping returns 32 bit address, but if the coherent_dma_mask is set to use wider than 32 bit addresses, it returns the wider address which seems obvious now. Please correct me if I'm wrong. Thank you! Chan Kim _______________________________________________ Kernelnewbies mailing list Kernelnewbies@kernelnewbies.org https://lists.kernelnewbies.org/mailman/listinfo/kernelnewbies