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charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Info: AW1haW4tMjYwNjE5MDE0NCBTYWx0ZWRfXxenLUUVHe9p3 8nHqonso+iqB5QM8nQTye3xf+XzrJGzlqqeFWDToYBYpB4L62cF1/GM+UUH45gnlaY0R/W13jyK l8FtOBbYxlMQIhhfmqqkgDpOOAO83cM= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNjE5MDE0NCBTYWx0ZWRfX5W332caElZbM II65iDWVQUMpxAipH5bdnJcNHrVsaiUzXWSjgVXCAk5qIxkbw5UZWqa0Zki1rJUqmQuy49tpnpG 2Lo6imxeuJqJjk2vg1bhwXXt7IBC20wpqcR8R89zsvpH7hZb6K4emuoDVc7iF1Cgf6SFyesWXKJ 3JzvzHYZGWoKcI/mfvSoAgHyU+EWIEf6yzruR4r3zDKSmESfXRMcNPdtINE7nEgGQ9SULDHHiAF +ybdoK1QKtE9/y+N/H75VJr4ixP6jKUuYhsJvkvlseqwgovpJcd3wALpQmLvxi0lUy3oR4W8pqU wxXhijwufDKVdd0GhzrRh2nNge9Nf/zMqQeZG0oysYr8SlTXEwjRtUs2QZ5fB/t/HtS5jKacA97 pc1weOWfd9WiuuBdcAm7Rzl/u6cmy5o+bqJJgldo0KuXm0dsyuKDh2QTNEN/oamgWx42KwuJmjt G0ArdLTWNeMadjHYLeA== X-Proofpoint-GUID: FVrvaowW_IPf1BWk-xHNHIY7IeTsKO2g X-Proofpoint-ORIG-GUID: FVrvaowW_IPf1BWk-xHNHIY7IeTsKO2g X-Authority-Analysis: v=2.4 cv=OM8XGyaB c=1 sm=1 tr=0 ts=6a355c6d cx=c_pps a=5HAIKLe1ejAbszaTRHs9Ug==:117 a=PRfkaYvzSr8QmIIGAkY2Sg==:17 a=IkcTkHD0fZMA:10 a=FelO9ux0wxsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=gowsoOTTUOVcmtlkKump:22 a=EUspDBNiAAAA:8 a=OOGWXGrbggnT5pNHG1IA:9 a=QEXdDO2ut3YA:10 a=gYDTvv6II1OnSo0itH1n:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-06-19_03,2026-06-18_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 malwarescore=0 adultscore=0 clxscore=1015 priorityscore=1501 lowpriorityscore=0 impostorscore=0 bulkscore=0 suspectscore=0 spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2606190144 On 6/12/26 10:00 AM, Dmitry Baryshkov wrote: > On Wed, Jun 10, 2026 at 03:36:20PM +0200, Konrad Dybcio wrote: >> On 5/17/26 9:16 PM, Dmitry Baryshkov wrote: >>> On Fri, May 15, 2026 at 09:06:21PM +0530, Krishna Kurapati wrote: >>>> >>>> >>>> On 5/14/2026 8:07 PM, Krzysztof Kozlowski wrote: >>>>> On 14/05/2026 08:22, Krishna Kurapati wrote: >>>>>> >>>>>> >>>>>> On 5/14/2026 12:26 AM, Krzysztof Kozlowski wrote: >>>>>>> On 07/05/2026 13:37, Krishna Kurapati wrote: >>>>>>>> >>>>>>>> >>>>>>>> On 5/5/2026 7:30 PM, Krzysztof Kozlowski wrote: >>>>>>>>> On 05/05/2026 15:57, Krishna Kurapati wrote: >>>>>>>>>> >>>>>>>>>> >>>>>>>>>> On 5/5/2026 6:59 PM, Krzysztof Kozlowski wrote: >>>>>>>>>>> On 05/05/2026 15:27, Krishna Kurapati wrote: >>>>>>>>>>>> >>>>>>>>>>>> >>>>>>>>>>>> On 5/5/2026 4:22 PM, Krzysztof Kozlowski wrote: >>>>>>>>>>>>> On 05/05/2026 12:49, Krzysztof Kozlowski wrote: >>>>>>>>>>>>>> On Mon, May 04, 2026 at 10:36:57PM +0530, Krishna Kurapati wrote: >>>>>>>>>>>>>>> Declare the USB-C QMP PHY present on the Qualcomm Shikra platform. >>>>>>>>>>>>>>> >>>>>>>>>>>>>>> Signed-off-by: Krishna Kurapati >>>>>>>>>>>>>>> --- >>>>>>>>>>>>>>> .../devicetree/bindings/phy/qcom,msm8998-qmp-usb3-phy.yaml | 2 ++ >>>>>>>>>>>>>>> 1 file changed, 2 insertions(+) >>>>>>>>>>>>>> >>>>>>>>>>>>>> Reviewed-by: Krzysztof Kozlowski >>>>>>>>>>>>> >>>>>>>>>>>>> ... and then I looked at the driver. So un-reviewed. Devices are clearly >>>>>>>>>>>>> compatible. If not, explain what is not compatible. >>>>>>>>>>>>> >>>>>>>>>>>> Talos uses GCC_USB3_PRIM_PHY_AUX_CLK. >>>>>>>>>>>> >>>>>>>>>>>> In Shikra, we are using GCC_USB3_PRIM_PHY_COM_AUX_CLK. We don't have >>>>>>>>>>>> GCC_USB3_PRIM_PHY_AUX_CLK. >>>>>>>>>>>> >>>>>>>>>>>> Hence, I didn't use a fallback compatible. >>>>>>>>>>> >>>>>>>>>>> This still explains nothing. How different clock makes interface for SW >>>>>>>>>>> incompatible exactly? >>>>>>>>>>> >>>>>>>>>> So I went by the naming. AUX vs COM_AUX. >>>>>>>>> >>>>>>>>> The naming does not matter. If the clock is called >>>>>>>>> "no_one_expects_spanish_inquisition", does that make software >>>>>>>>> incompatible? Why would the name itself matter? >>>>>>>>> >>>>>>>>>> >>>>>>>>>> Can I use a fallback compatible and in DT vote for "COM_AUX" clock with >>>>>>>>>> clock-names mentioning "aux" ? >>>>>>>>> >>>>>>>>> I don't know, I asked what is different in software interface. >>>>>>>>> >>>>>>>> >>>>>>>> Hi Krzysztof, >>>>>>>> >>>>>>>> I checked with the hw team here and found out two things. >>>>>>>> >>>>>>>> 1. Shikra is a spinoff of Agatti and its sw interface (clocks used and >>>>>>>> regulators used) is the same as agatti. >>>>>>>> >>>>>>>> 2. I thought we could use qcm2290 as a fallback since the phy register >>>>>>>> init sequence is the same for Talos/Shikra/Agatti. The difference >>>>>>>> between Talos and agatti when checked in the driver was the init load >>>>>>>> settings. I checked with the hw team and they suggested using the init >>>>>>>> load settings which talos was using. >>>>>>>> >>>>>>>> Hence both these compatibles (qcm2290 and qcs615) cannot be used as >>>>>>>> fallback for Shikra. >>>>>>> >>>>>>> Then I do not understand why you are using qcs615_usb3phy_cfg for >>>>>>> Shikra. You say that the initialization is different, but you use >>>>>>> exactly the same initialization. So in a meaning of compatibility >>>>>>> between hardware for Devicetree they are compatible. >>>>>>> >>>>>> Hi Krzysztof, >>>>>> >>>>>> There are 3 things: >>>>>> >>>>>> 1. Clocks used: >>>>>> -> Talos supports AUX Clock since it supports DP over USB. >>>>>> -> Agatti and Shikra use COM_AUX clock since they dont support DP over USB. >>>>>> >>>>>> 2. Phy register Init sequence - same for all 3 targets >>>>>> >>>>>> 3. Regulator init load: >>>>>> -> Different for both Talos and Agatti >>>>>> -> Recommendation is to use Talos regulator load values. >>>>>> >>>>>> SW interface wise, shikra is comaptible with agatti. If we use agatti as >>>>>> fallback, we would end up using the platform data of Agatti where the >>>>>> regulator init load is not suitable for Shikra. Hence not using Agatti >>>>>> as fallback. >>>>>> >>>>>> Coming to driver changes, I used qcs615_cfg because it has required phy >>>>>> register sequence and regulator init load as needed by shikra. >>>>> >>>>> So is it compatible with QCS615? If not, then something is incomplete or >>>>> confusing. The driver uses the same software interface. >>>>> >>>> Sorry for the confusion. The Talos compatible represents the USB/DP PHY with >>>> aux clock input, while Shikra is a USB-only PHY with com_aux input clock, so >>>> the two PHYs are not compatible with each other. >>> >>> According to the memory map, there is an (unused) DP registers part >>> right after the QMP USB3 PHY. So, sofware-wise it is compatible to >>> Talos. Having the different clock input means different integration of >>> the block rather than the differences in the hardware block. >>> >>> So, the block should be compatible to qcom,qcs615-qmp-usb3-dp-phy >> >> It should still carry its own compatible though, to let the driver >> disallow powering up the DP part > > Why? The DP part is there, in the PHY, pretty much like it's present on > most of USBC platforms. I assume it can be powered on. There is no > point in it though as there is no DP controller (nor DP pins). I wouldn't bet too much on that sub-block being fully silicon-validated given its of no use as there isn't a DPTX onboard.. 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charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org On 6/12/26 10:00 AM, Dmitry Baryshkov wrote: > On Wed, Jun 10, 2026 at 03:36:20PM +0200, Konrad Dybcio wrote: >> On 5/17/26 9:16 PM, Dmitry Baryshkov wrote: >>> On Fri, May 15, 2026 at 09:06:21PM +0530, Krishna Kurapati wrote: >>>> >>>> >>>> On 5/14/2026 8:07 PM, Krzysztof Kozlowski wrote: >>>>> On 14/05/2026 08:22, Krishna Kurapati wrote: >>>>>> >>>>>> >>>>>> On 5/14/2026 12:26 AM, Krzysztof Kozlowski wrote: >>>>>>> On 07/05/2026 13:37, Krishna Kurapati wrote: >>>>>>>> >>>>>>>> >>>>>>>> On 5/5/2026 7:30 PM, Krzysztof Kozlowski wrote: >>>>>>>>> On 05/05/2026 15:57, Krishna Kurapati wrote: >>>>>>>>>> >>>>>>>>>> >>>>>>>>>> On 5/5/2026 6:59 PM, Krzysztof Kozlowski wrote: >>>>>>>>>>> On 05/05/2026 15:27, Krishna Kurapati wrote: >>>>>>>>>>>> >>>>>>>>>>>> >>>>>>>>>>>> On 5/5/2026 4:22 PM, Krzysztof Kozlowski wrote: >>>>>>>>>>>>> On 05/05/2026 12:49, Krzysztof Kozlowski wrote: >>>>>>>>>>>>>> On Mon, May 04, 2026 at 10:36:57PM +0530, Krishna Kurapati wrote: >>>>>>>>>>>>>>> Declare the USB-C QMP PHY present on the Qualcomm Shikra platform. >>>>>>>>>>>>>>> >>>>>>>>>>>>>>> Signed-off-by: Krishna Kurapati >>>>>>>>>>>>>>> --- >>>>>>>>>>>>>>> .../devicetree/bindings/phy/qcom,msm8998-qmp-usb3-phy.yaml | 2 ++ >>>>>>>>>>>>>>> 1 file changed, 2 insertions(+) >>>>>>>>>>>>>> >>>>>>>>>>>>>> Reviewed-by: Krzysztof Kozlowski >>>>>>>>>>>>> >>>>>>>>>>>>> ... and then I looked at the driver. So un-reviewed. Devices are clearly >>>>>>>>>>>>> compatible. If not, explain what is not compatible. >>>>>>>>>>>>> >>>>>>>>>>>> Talos uses GCC_USB3_PRIM_PHY_AUX_CLK. >>>>>>>>>>>> >>>>>>>>>>>> In Shikra, we are using GCC_USB3_PRIM_PHY_COM_AUX_CLK. We don't have >>>>>>>>>>>> GCC_USB3_PRIM_PHY_AUX_CLK. >>>>>>>>>>>> >>>>>>>>>>>> Hence, I didn't use a fallback compatible. >>>>>>>>>>> >>>>>>>>>>> This still explains nothing. How different clock makes interface for SW >>>>>>>>>>> incompatible exactly? >>>>>>>>>>> >>>>>>>>>> So I went by the naming. AUX vs COM_AUX. >>>>>>>>> >>>>>>>>> The naming does not matter. If the clock is called >>>>>>>>> "no_one_expects_spanish_inquisition", does that make software >>>>>>>>> incompatible? Why would the name itself matter? >>>>>>>>> >>>>>>>>>> >>>>>>>>>> Can I use a fallback compatible and in DT vote for "COM_AUX" clock with >>>>>>>>>> clock-names mentioning "aux" ? >>>>>>>>> >>>>>>>>> I don't know, I asked what is different in software interface. >>>>>>>>> >>>>>>>> >>>>>>>> Hi Krzysztof, >>>>>>>> >>>>>>>> I checked with the hw team here and found out two things. >>>>>>>> >>>>>>>> 1. Shikra is a spinoff of Agatti and its sw interface (clocks used and >>>>>>>> regulators used) is the same as agatti. >>>>>>>> >>>>>>>> 2. I thought we could use qcm2290 as a fallback since the phy register >>>>>>>> init sequence is the same for Talos/Shikra/Agatti. The difference >>>>>>>> between Talos and agatti when checked in the driver was the init load >>>>>>>> settings. I checked with the hw team and they suggested using the init >>>>>>>> load settings which talos was using. >>>>>>>> >>>>>>>> Hence both these compatibles (qcm2290 and qcs615) cannot be used as >>>>>>>> fallback for Shikra. >>>>>>> >>>>>>> Then I do not understand why you are using qcs615_usb3phy_cfg for >>>>>>> Shikra. You say that the initialization is different, but you use >>>>>>> exactly the same initialization. So in a meaning of compatibility >>>>>>> between hardware for Devicetree they are compatible. >>>>>>> >>>>>> Hi Krzysztof, >>>>>> >>>>>> There are 3 things: >>>>>> >>>>>> 1. Clocks used: >>>>>> -> Talos supports AUX Clock since it supports DP over USB. >>>>>> -> Agatti and Shikra use COM_AUX clock since they dont support DP over USB. >>>>>> >>>>>> 2. Phy register Init sequence - same for all 3 targets >>>>>> >>>>>> 3. Regulator init load: >>>>>> -> Different for both Talos and Agatti >>>>>> -> Recommendation is to use Talos regulator load values. >>>>>> >>>>>> SW interface wise, shikra is comaptible with agatti. If we use agatti as >>>>>> fallback, we would end up using the platform data of Agatti where the >>>>>> regulator init load is not suitable for Shikra. Hence not using Agatti >>>>>> as fallback. >>>>>> >>>>>> Coming to driver changes, I used qcs615_cfg because it has required phy >>>>>> register sequence and regulator init load as needed by shikra. >>>>> >>>>> So is it compatible with QCS615? If not, then something is incomplete or >>>>> confusing. The driver uses the same software interface. >>>>> >>>> Sorry for the confusion. The Talos compatible represents the USB/DP PHY with >>>> aux clock input, while Shikra is a USB-only PHY with com_aux input clock, so >>>> the two PHYs are not compatible with each other. >>> >>> According to the memory map, there is an (unused) DP registers part >>> right after the QMP USB3 PHY. So, sofware-wise it is compatible to >>> Talos. Having the different clock input means different integration of >>> the block rather than the differences in the hardware block. >>> >>> So, the block should be compatible to qcom,qcs615-qmp-usb3-dp-phy >> >> It should still carry its own compatible though, to let the driver >> disallow powering up the DP part > > Why? The DP part is there, in the PHY, pretty much like it's present on > most of USBC platforms. I assume it can be powered on. There is no > point in it though as there is no DP controller (nor DP pins). I wouldn't bet too much on that sub-block being fully silicon-validated given its of no use as there isn't a DPTX onboard.. Konrad -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy