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Fri, 04 Oct 2024 16:35:13 -0700 (PDT) Received: from [10.69.74.64] ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id d75a77b69052e-45da75fec33sm3392631cf.69.2024.10.04.16.35.11 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 04 Oct 2024 16:35:13 -0700 (PDT) Message-ID: <054d62af-721d-40dd-9e95-e43d0579def5@broadcom.com> Date: Fri, 4 Oct 2024 16:35:11 -0700 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 2/2] phy: usb: update Broadcom driver table to use designated initializers To: Sam Edwards , Al Cooper Cc: Broadcom internal kernel review list , Vinod Koul , Kishon Vijay Abraham I , Florian Fainelli , linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org References: <20241004034131.1363813-1-CFSworks@gmail.com> <20241004034131.1363813-3-CFSworks@gmail.com> Content-Language: en-US From: Justin Chen In-Reply-To: <20241004034131.1363813-3-CFSworks@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241004_163515_229147_9BDC1B8D X-CRM114-Status: GOOD ( 17.98 ) X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org On 10/3/24 8:41 PM, Sam Edwards wrote: > The Broadcom USB PHY driver contains a lookup table > (`reg_bits_map_tables`) to resolve register bitmaps unique to certain > versions of the USB PHY as found in various Broadcom chip families. > Historically, this table was just kept carefully in sync with the > "selector" enum every time the latter changed to ensure consistency. > However, a recent commit [1] introduced two new enumerators but did not > adjust the array for BCM4908, thus breaking the xHCI controller (and > boot process) on this platform and revealing the fragility of this > approach. > > Since these arrays are a little sparse (many elements are zero) and the > position of the array elements is significant only insofar as they agree > with the enumerators, designated initializers are a better fit than > positional initializers here. Convert this table accordingly. > > [1] 4536fe9640b6 ("phy: usb: suppress OC condition for 7439b2") > > Signed-off-by: Sam Edwards Reviewed-by: Justin Chen > --- > drivers/phy/broadcom/phy-brcm-usb-init.c | 435 +++++++++++------------ > 1 file changed, 215 insertions(+), 220 deletions(-) > > diff --git a/drivers/phy/broadcom/phy-brcm-usb-init.c b/drivers/phy/broadcom/phy-brcm-usb-init.c > index 5ebb3a616115..da23078878a9 100644 > --- a/drivers/phy/broadcom/phy-brcm-usb-init.c > +++ b/drivers/phy/broadcom/phy-brcm-usb-init.c > @@ -193,256 +193,251 @@ static const u32 > usb_reg_bits_map_table[BRCM_FAMILY_COUNT][USB_CTRL_SELECTOR_COUNT] = { > /* 3390B0 */ > [BRCM_FAMILY_3390A0] = { > - USB_CTRL_SETUP_SCB1_EN_MASK, > - USB_CTRL_SETUP_SCB2_EN_MASK, > - USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK, > - USB_CTRL_SETUP_STRAP_IPP_SEL_MASK, > - USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK, > - USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK, > - USB_CTRL_SETUP_OC3_DISABLE_MASK, > - 0, /* USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK */ > - 0, /* USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK */ > - USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK, > - USB_CTRL_USB_PM_USB_PWRDN_MASK, > - 0, /* USB_CTRL_USB30_CTL1_XHC_SOFT_RESETB_MASK */ > - 0, /* USB_CTRL_USB30_CTL1_USB3_IOC_MASK */ > - 0, /* USB_CTRL_USB30_CTL1_USB3_IPP_MASK */ > - USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK, > - 0, /* USB_CTRL_USB_PM_SOFT_RESET_MASK */ > - 0, /* USB_CTRL_SETUP_CC_DRD_MODE_ENABLE_MASK */ > - 0, /* USB_CTRL_SETUP_STRAP_CC_DRD_MODE_ENABLE_SEL_MASK */ > - USB_CTRL_USB_PM_USB20_HC_RESETB_VAR_MASK, > - ENDIAN_SETTINGS, /* USB_CTRL_SETUP ENDIAN bits */ > + [USB_CTRL_SETUP_SCB1_EN_SELECTOR] = > + USB_CTRL_SETUP_SCB1_EN_MASK, > + [USB_CTRL_SETUP_SCB2_EN_SELECTOR] = > + USB_CTRL_SETUP_SCB2_EN_MASK, > + [USB_CTRL_SETUP_SS_EHCI64BIT_EN_SELECTOR] = > + USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK, > + [USB_CTRL_SETUP_STRAP_IPP_SEL_SELECTOR] = > + USB_CTRL_SETUP_STRAP_IPP_SEL_MASK, > + [USB_CTRL_SETUP_OC3_DISABLE_PORT0_SELECTOR] = > + USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK, > + [USB_CTRL_SETUP_OC3_DISABLE_PORT1_SELECTOR] = > + USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK, > + [USB_CTRL_SETUP_OC3_DISABLE_SELECTOR] = > + USB_CTRL_SETUP_OC3_DISABLE_MASK, > + [USB_CTRL_USB_PM_XHC_SOFT_RESETB_SELECTOR] = > + USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK, > + [USB_CTRL_USB_PM_USB_PWRDN_SELECTOR] = > + USB_CTRL_USB_PM_USB_PWRDN_MASK, > + [USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_SELECTOR] = > + USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK, > + [USB_CTRL_USB_PM_USB20_HC_RESETB_SELECTOR] = > + USB_CTRL_USB_PM_USB20_HC_RESETB_VAR_MASK, > + [USB_CTRL_SETUP_ENDIAN_SELECTOR] = ENDIAN_SETTINGS, > }, > /* 4908 */ > [BRCM_FAMILY_4908] = { > - 0, /* USB_CTRL_SETUP_SCB1_EN_MASK */ > - 0, /* USB_CTRL_SETUP_SCB2_EN_MASK */ > - 0, /* USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK */ > - 0, /* USB_CTRL_SETUP_STRAP_IPP_SEL_MASK */ > - 0, /* USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK */ > - 0, /* USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK */ > - 0, /* USB_CTRL_SETUP_OC3_DISABLE_MASK */ > - 0, /* USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK */ > - 0, /* USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK */ > - USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK, > - USB_CTRL_USB_PM_USB_PWRDN_MASK, > - 0, /* USB_CTRL_USB30_CTL1_XHC_SOFT_RESETB_MASK */ > - 0, /* USB_CTRL_USB30_CTL1_USB3_IOC_MASK */ > - 0, /* USB_CTRL_USB30_CTL1_USB3_IPP_MASK */ > - 0, /* USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK */ > - 0, /* USB_CTRL_USB_PM_SOFT_RESET_MASK */ > - 0, /* USB_CTRL_SETUP_CC_DRD_MODE_ENABLE_MASK */ > - 0, /* USB_CTRL_SETUP_STRAP_CC_DRD_MODE_ENABLE_SEL_MASK */ > - 0, /* USB_CTRL_USB_PM_USB20_HC_RESETB_VAR_MASK */ > - 0, /* USB_CTRL_SETUP ENDIAN bits */ > + [USB_CTRL_USB_PM_XHC_SOFT_RESETB_SELECTOR] = > + USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK, > + [USB_CTRL_USB_PM_USB_PWRDN_SELECTOR] = > + USB_CTRL_USB_PM_USB_PWRDN_MASK, > }, > /* 7250b0 */ > [BRCM_FAMILY_7250B0] = { > - USB_CTRL_SETUP_SCB1_EN_MASK, > - USB_CTRL_SETUP_SCB2_EN_MASK, > - USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK, > - 0, /* USB_CTRL_SETUP_STRAP_IPP_SEL_MASK */ > - USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK, > - USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK, > - USB_CTRL_SETUP_OC3_DISABLE_MASK, > - USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK, > - 0, /* USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK */ > - USB_CTRL_USB_PM_XHC_SOFT_RESETB_VAR_MASK, > - 0, /* USB_CTRL_USB_PM_USB_PWRDN_MASK */ > - 0, /* USB_CTRL_USB30_CTL1_XHC_SOFT_RESETB_MASK */ > - 0, /* USB_CTRL_USB30_CTL1_USB3_IOC_MASK */ > - 0, /* USB_CTRL_USB30_CTL1_USB3_IPP_MASK */ > - 0, /* USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK */ > - 0, /* USB_CTRL_USB_PM_SOFT_RESET_MASK */ > - 0, /* USB_CTRL_SETUP_CC_DRD_MODE_ENABLE_MASK */ > - 0, /* USB_CTRL_SETUP_STRAP_CC_DRD_MODE_ENABLE_SEL_MASK */ > - USB_CTRL_USB_PM_USB20_HC_RESETB_MASK, > - ENDIAN_SETTINGS, /* USB_CTRL_SETUP ENDIAN bits */ > + [USB_CTRL_SETUP_SCB1_EN_SELECTOR] = > + USB_CTRL_SETUP_SCB1_EN_MASK, > + [USB_CTRL_SETUP_SCB2_EN_SELECTOR] = > + USB_CTRL_SETUP_SCB2_EN_MASK, > + [USB_CTRL_SETUP_SS_EHCI64BIT_EN_SELECTOR] = > + USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK, > + [USB_CTRL_SETUP_OC3_DISABLE_PORT0_SELECTOR] = > + USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK, > + [USB_CTRL_SETUP_OC3_DISABLE_PORT1_SELECTOR] = > + USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK, > + [USB_CTRL_SETUP_OC3_DISABLE_SELECTOR] = > + USB_CTRL_SETUP_OC3_DISABLE_MASK, > + [USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_SELECTOR] = > + USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK, > + [USB_CTRL_USB_PM_XHC_SOFT_RESETB_SELECTOR] = > + USB_CTRL_USB_PM_XHC_SOFT_RESETB_VAR_MASK, > + [USB_CTRL_USB_PM_USB20_HC_RESETB_SELECTOR] = > + USB_CTRL_USB_PM_USB20_HC_RESETB_MASK, > + [USB_CTRL_SETUP_ENDIAN_SELECTOR] = ENDIAN_SETTINGS, > }, > /* 7271a0 */ > [BRCM_FAMILY_7271A0] = { > - 0, /* USB_CTRL_SETUP_SCB1_EN_MASK */ > - 0, /* USB_CTRL_SETUP_SCB2_EN_MASK */ > - USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK, > - USB_CTRL_SETUP_STRAP_IPP_SEL_MASK, > - USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK, > - USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK, > - USB_CTRL_SETUP_OC3_DISABLE_MASK, > - 0, /* USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK */ > - USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK, > - USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK, > - USB_CTRL_USB_PM_USB_PWRDN_MASK, > - 0, /* USB_CTRL_USB30_CTL1_XHC_SOFT_RESETB_MASK */ > - 0, /* USB_CTRL_USB30_CTL1_USB3_IOC_MASK */ > - 0, /* USB_CTRL_USB30_CTL1_USB3_IPP_MASK */ > - USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK, > - USB_CTRL_USB_PM_SOFT_RESET_MASK, > - USB_CTRL_SETUP_CC_DRD_MODE_ENABLE_MASK, > - USB_CTRL_SETUP_STRAP_CC_DRD_MODE_ENABLE_SEL_MASK, > - USB_CTRL_USB_PM_USB20_HC_RESETB_VAR_MASK, > - ENDIAN_SETTINGS, /* USB_CTRL_SETUP ENDIAN bits */ > + [USB_CTRL_SETUP_SS_EHCI64BIT_EN_SELECTOR] = > + USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK, > + [USB_CTRL_SETUP_STRAP_IPP_SEL_SELECTOR] = > + USB_CTRL_SETUP_STRAP_IPP_SEL_MASK, > + [USB_CTRL_SETUP_OC3_DISABLE_PORT0_SELECTOR] = > + USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK, > + [USB_CTRL_SETUP_OC3_DISABLE_PORT1_SELECTOR] = > + USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK, > + [USB_CTRL_SETUP_OC3_DISABLE_SELECTOR] = > + USB_CTRL_SETUP_OC3_DISABLE_MASK, > + [USB_CTRL_USB_PM_BDC_SOFT_RESETB_SELECTOR] = > + USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK, > + [USB_CTRL_USB_PM_XHC_SOFT_RESETB_SELECTOR] = > + USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK, > + [USB_CTRL_USB_PM_USB_PWRDN_SELECTOR] = > + USB_CTRL_USB_PM_USB_PWRDN_MASK, > + [USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_SELECTOR] = > + USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK, > + [USB_CTRL_USB_PM_SOFT_RESET_SELECTOR] = > + USB_CTRL_USB_PM_SOFT_RESET_MASK, > + [USB_CTRL_SETUP_CC_DRD_MODE_ENABLE_SELECTOR] = > + USB_CTRL_SETUP_CC_DRD_MODE_ENABLE_MASK, > + [USB_CTRL_SETUP_STRAP_CC_DRD_MODE_ENABLE_SEL_SELECTOR] = > + USB_CTRL_SETUP_STRAP_CC_DRD_MODE_ENABLE_SEL_MASK, > + [USB_CTRL_USB_PM_USB20_HC_RESETB_SELECTOR] = > + USB_CTRL_USB_PM_USB20_HC_RESETB_VAR_MASK, > + [USB_CTRL_SETUP_ENDIAN_SELECTOR] = ENDIAN_SETTINGS, > }, > /* 7364a0 */ > [BRCM_FAMILY_7364A0] = { > - USB_CTRL_SETUP_SCB1_EN_MASK, > - USB_CTRL_SETUP_SCB2_EN_MASK, > - USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK, > - 0, /* USB_CTRL_SETUP_STRAP_IPP_SEL_MASK */ > - USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK, > - USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK, > - USB_CTRL_SETUP_OC3_DISABLE_MASK, > - USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK, > - 0, /* USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK */ > - USB_CTRL_USB_PM_XHC_SOFT_RESETB_VAR_MASK, > - 0, /* USB_CTRL_USB_PM_USB_PWRDN_MASK */ > - 0, /* USB_CTRL_USB30_CTL1_XHC_SOFT_RESETB_MASK */ > - 0, /* USB_CTRL_USB30_CTL1_USB3_IOC_MASK */ > - 0, /* USB_CTRL_USB30_CTL1_USB3_IPP_MASK */ > - 0, /* USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK */ > - 0, /* USB_CTRL_USB_PM_SOFT_RESET_MASK */ > - 0, /* USB_CTRL_SETUP_CC_DRD_MODE_ENABLE_MASK */ > - 0, /* USB_CTRL_SETUP_STRAP_CC_DRD_MODE_ENABLE_SEL_MASK */ > - USB_CTRL_USB_PM_USB20_HC_RESETB_MASK, > - ENDIAN_SETTINGS, /* USB_CTRL_SETUP ENDIAN bits */ > + [USB_CTRL_SETUP_SCB1_EN_SELECTOR] = > + USB_CTRL_SETUP_SCB1_EN_MASK, > + [USB_CTRL_SETUP_SCB2_EN_SELECTOR] = > + USB_CTRL_SETUP_SCB2_EN_MASK, > + [USB_CTRL_SETUP_SS_EHCI64BIT_EN_SELECTOR] = > + USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK, > + [USB_CTRL_SETUP_OC3_DISABLE_PORT0_SELECTOR] = > + USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK, > + [USB_CTRL_SETUP_OC3_DISABLE_PORT1_SELECTOR] = > + USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK, > + [USB_CTRL_SETUP_OC3_DISABLE_SELECTOR] = > + USB_CTRL_SETUP_OC3_DISABLE_MASK, > + [USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_SELECTOR] = > + USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK, > + [USB_CTRL_USB_PM_XHC_SOFT_RESETB_SELECTOR] = > + USB_CTRL_USB_PM_XHC_SOFT_RESETB_VAR_MASK, > + [USB_CTRL_USB_PM_USB20_HC_RESETB_SELECTOR] = > + USB_CTRL_USB_PM_USB20_HC_RESETB_MASK, > + [USB_CTRL_SETUP_ENDIAN_SELECTOR] = ENDIAN_SETTINGS, > }, > /* 7366c0 */ > [BRCM_FAMILY_7366C0] = { > - USB_CTRL_SETUP_SCB1_EN_MASK, > - USB_CTRL_SETUP_SCB2_EN_MASK, > - USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK, > - 0, /* USB_CTRL_SETUP_STRAP_IPP_SEL_MASK */ > - USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK, > - USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK, > - USB_CTRL_SETUP_OC3_DISABLE_MASK, > - 0, /* USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK */ > - 0, /* USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK */ > - USB_CTRL_USB_PM_XHC_SOFT_RESETB_VAR_MASK, > - USB_CTRL_USB_PM_USB_PWRDN_MASK, > - 0, /* USB_CTRL_USB30_CTL1_XHC_SOFT_RESETB_MASK */ > - 0, /* USB_CTRL_USB30_CTL1_USB3_IOC_MASK */ > - 0, /* USB_CTRL_USB30_CTL1_USB3_IPP_MASK */ > - 0, /* USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK */ > - 0, /* USB_CTRL_USB_PM_SOFT_RESET_MASK */ > - 0, /* USB_CTRL_SETUP_CC_DRD_MODE_ENABLE_MASK */ > - 0, /* USB_CTRL_SETUP_STRAP_CC_DRD_MODE_ENABLE_SEL_MASK */ > - USB_CTRL_USB_PM_USB20_HC_RESETB_MASK, > - ENDIAN_SETTINGS, /* USB_CTRL_SETUP ENDIAN bits */ > + [USB_CTRL_SETUP_SCB1_EN_SELECTOR] = > + USB_CTRL_SETUP_SCB1_EN_MASK, > + [USB_CTRL_SETUP_SCB2_EN_SELECTOR] = > + USB_CTRL_SETUP_SCB2_EN_MASK, > + [USB_CTRL_SETUP_SS_EHCI64BIT_EN_SELECTOR] = > + USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK, > + [USB_CTRL_SETUP_OC3_DISABLE_PORT0_SELECTOR] = > + USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK, > + [USB_CTRL_SETUP_OC3_DISABLE_PORT1_SELECTOR] = > + USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK, > + [USB_CTRL_SETUP_OC3_DISABLE_SELECTOR] = > + USB_CTRL_SETUP_OC3_DISABLE_MASK, > + [USB_CTRL_USB_PM_XHC_SOFT_RESETB_SELECTOR] = > + USB_CTRL_USB_PM_XHC_SOFT_RESETB_VAR_MASK, > + [USB_CTRL_USB_PM_USB_PWRDN_SELECTOR] = > + USB_CTRL_USB_PM_USB_PWRDN_MASK, > + [USB_CTRL_USB_PM_USB20_HC_RESETB_SELECTOR] = > + USB_CTRL_USB_PM_USB20_HC_RESETB_MASK, > + [USB_CTRL_SETUP_ENDIAN_SELECTOR] = ENDIAN_SETTINGS, > }, > /* 74371A0 */ > [BRCM_FAMILY_74371A0] = { > - USB_CTRL_SETUP_SCB1_EN_MASK, > - USB_CTRL_SETUP_SCB2_EN_MASK, > - USB_CTRL_SETUP_SS_EHCI64BIT_EN_VAR_MASK, > - 0, /* USB_CTRL_SETUP_STRAP_IPP_SEL_MASK */ > - 0, /* USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK */ > - 0, /* USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK */ > - 0, /* USB_CTRL_SETUP_OC3_DISABLE_MASK */ > - USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK, > - 0, /* USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK */ > - 0, /* USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK */ > - 0, /* USB_CTRL_USB_PM_USB_PWRDN_MASK */ > - USB_CTRL_USB30_CTL1_XHC_SOFT_RESETB_MASK, > - USB_CTRL_USB30_CTL1_USB3_IOC_MASK, > - USB_CTRL_USB30_CTL1_USB3_IPP_MASK, > - 0, /* USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK */ > - 0, /* USB_CTRL_USB_PM_SOFT_RESET_MASK */ > - 0, /* USB_CTRL_SETUP_CC_DRD_MODE_ENABLE_MASK */ > - 0, /* USB_CTRL_SETUP_STRAP_CC_DRD_MODE_ENABLE_SEL_MASK */ > - 0, /* USB_CTRL_USB_PM_USB20_HC_RESETB_MASK */ > - ENDIAN_SETTINGS, /* USB_CTRL_SETUP ENDIAN bits */ > + [USB_CTRL_SETUP_SCB1_EN_SELECTOR] = > + USB_CTRL_SETUP_SCB1_EN_MASK, > + [USB_CTRL_SETUP_SCB2_EN_SELECTOR] = > + USB_CTRL_SETUP_SCB2_EN_MASK, > + [USB_CTRL_SETUP_SS_EHCI64BIT_EN_SELECTOR] = > + USB_CTRL_SETUP_SS_EHCI64BIT_EN_VAR_MASK, > + [USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_SELECTOR] = > + USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK, > + [USB_CTRL_USB30_CTL1_XHC_SOFT_RESETB_SELECTOR] = > + USB_CTRL_USB30_CTL1_XHC_SOFT_RESETB_MASK, > + [USB_CTRL_USB30_CTL1_USB3_IOC_SELECTOR] = > + USB_CTRL_USB30_CTL1_USB3_IOC_MASK, > + [USB_CTRL_USB30_CTL1_USB3_IPP_SELECTOR] = > + USB_CTRL_USB30_CTL1_USB3_IPP_MASK, > + [USB_CTRL_SETUP_ENDIAN_SELECTOR] = ENDIAN_SETTINGS, > }, > /* 7439B0 */ > [BRCM_FAMILY_7439B0] = { > - USB_CTRL_SETUP_SCB1_EN_MASK, > - USB_CTRL_SETUP_SCB2_EN_MASK, > - USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK, > - USB_CTRL_SETUP_STRAP_IPP_SEL_MASK, > - USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK, > - USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK, > - USB_CTRL_SETUP_OC3_DISABLE_MASK, > - 0, /* USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK */ > - USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK, > - USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK, > - USB_CTRL_USB_PM_USB_PWRDN_MASK, > - 0, /* USB_CTRL_USB30_CTL1_XHC_SOFT_RESETB_MASK */ > - 0, /* USB_CTRL_USB30_CTL1_USB3_IOC_MASK */ > - 0, /* USB_CTRL_USB30_CTL1_USB3_IPP_MASK */ > - USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK, > - 0, /* USB_CTRL_USB_PM_SOFT_RESET_MASK */ > - 0, /* USB_CTRL_SETUP_CC_DRD_MODE_ENABLE_MASK */ > - 0, /* USB_CTRL_SETUP_STRAP_CC_DRD_MODE_ENABLE_SEL_MASK */ > - USB_CTRL_USB_PM_USB20_HC_RESETB_VAR_MASK, > - ENDIAN_SETTINGS, /* USB_CTRL_SETUP ENDIAN bits */ > + [USB_CTRL_SETUP_SCB1_EN_SELECTOR] = > + USB_CTRL_SETUP_SCB1_EN_MASK, > + [USB_CTRL_SETUP_SCB2_EN_SELECTOR] = > + USB_CTRL_SETUP_SCB2_EN_MASK, > + [USB_CTRL_SETUP_SS_EHCI64BIT_EN_SELECTOR] = > + USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK, > + [USB_CTRL_SETUP_STRAP_IPP_SEL_SELECTOR] = > + USB_CTRL_SETUP_STRAP_IPP_SEL_MASK, > + [USB_CTRL_SETUP_OC3_DISABLE_PORT0_SELECTOR] = > + USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK, > + [USB_CTRL_SETUP_OC3_DISABLE_PORT1_SELECTOR] = > + USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK, > + [USB_CTRL_SETUP_OC3_DISABLE_SELECTOR] = > + USB_CTRL_SETUP_OC3_DISABLE_MASK, > + [USB_CTRL_USB_PM_BDC_SOFT_RESETB_SELECTOR] = > + USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK, > + [USB_CTRL_USB_PM_XHC_SOFT_RESETB_SELECTOR] = > + USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK, > + [USB_CTRL_USB_PM_USB_PWRDN_SELECTOR] = > + USB_CTRL_USB_PM_USB_PWRDN_MASK, > + [USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_SELECTOR] = > + USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK, > + [USB_CTRL_USB_PM_USB20_HC_RESETB_SELECTOR] = > + USB_CTRL_USB_PM_USB20_HC_RESETB_VAR_MASK, > + [USB_CTRL_SETUP_ENDIAN_SELECTOR] = ENDIAN_SETTINGS, > }, > /* 7445d0 */ > [BRCM_FAMILY_7445D0] = { > - USB_CTRL_SETUP_SCB1_EN_MASK, > - USB_CTRL_SETUP_SCB2_EN_MASK, > - USB_CTRL_SETUP_SS_EHCI64BIT_EN_VAR_MASK, > - 0, /* USB_CTRL_SETUP_STRAP_IPP_SEL_MASK */ > - USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK, > - USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK, > - USB_CTRL_SETUP_OC3_DISABLE_MASK, > - USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK, > - 0, /* USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK */ > - 0, /* USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK */ > - 0, /* USB_CTRL_USB_PM_USB_PWRDN_MASK */ > - USB_CTRL_USB30_CTL1_XHC_SOFT_RESETB_MASK, > - 0, /* USB_CTRL_USB30_CTL1_USB3_IOC_MASK */ > - 0, /* USB_CTRL_USB30_CTL1_USB3_IPP_MASK */ > - 0, /* USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK */ > - 0, /* USB_CTRL_USB_PM_SOFT_RESET_MASK */ > - 0, /* USB_CTRL_SETUP_CC_DRD_MODE_ENABLE_MASK */ > - 0, /* USB_CTRL_SETUP_STRAP_CC_DRD_MODE_ENABLE_SEL_MASK */ > - USB_CTRL_USB_PM_USB20_HC_RESETB_VAR_MASK, > - ENDIAN_SETTINGS, /* USB_CTRL_SETUP ENDIAN bits */ > + [USB_CTRL_SETUP_SCB1_EN_SELECTOR] = > + USB_CTRL_SETUP_SCB1_EN_MASK, > + [USB_CTRL_SETUP_SCB2_EN_SELECTOR] = > + USB_CTRL_SETUP_SCB2_EN_MASK, > + [USB_CTRL_SETUP_SS_EHCI64BIT_EN_SELECTOR] = > + USB_CTRL_SETUP_SS_EHCI64BIT_EN_VAR_MASK, > + [USB_CTRL_SETUP_OC3_DISABLE_PORT0_SELECTOR] = > + USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK, > + [USB_CTRL_SETUP_OC3_DISABLE_PORT1_SELECTOR] = > + USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK, > + [USB_CTRL_SETUP_OC3_DISABLE_SELECTOR] = > + USB_CTRL_SETUP_OC3_DISABLE_MASK, > + [USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_SELECTOR] = > + USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK, > + [USB_CTRL_USB30_CTL1_XHC_SOFT_RESETB_SELECTOR] = > + USB_CTRL_USB30_CTL1_XHC_SOFT_RESETB_MASK, > + [USB_CTRL_USB_PM_USB20_HC_RESETB_SELECTOR] = > + USB_CTRL_USB_PM_USB20_HC_RESETB_VAR_MASK, > + [USB_CTRL_SETUP_ENDIAN_SELECTOR] = ENDIAN_SETTINGS, > }, > /* 7260a0 */ > [BRCM_FAMILY_7260A0] = { > - 0, /* USB_CTRL_SETUP_SCB1_EN_MASK */ > - 0, /* USB_CTRL_SETUP_SCB2_EN_MASK */ > - USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK, > - USB_CTRL_SETUP_STRAP_IPP_SEL_MASK, > - USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK, > - USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK, > - USB_CTRL_SETUP_OC3_DISABLE_MASK, > - 0, /* USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK */ > - USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK, > - USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK, > - USB_CTRL_USB_PM_USB_PWRDN_MASK, > - 0, /* USB_CTRL_USB30_CTL1_XHC_SOFT_RESETB_MASK */ > - 0, /* USB_CTRL_USB30_CTL1_USB3_IOC_MASK */ > - 0, /* USB_CTRL_USB30_CTL1_USB3_IPP_MASK */ > - USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK, > - USB_CTRL_USB_PM_SOFT_RESET_MASK, > - USB_CTRL_SETUP_CC_DRD_MODE_ENABLE_MASK, > - USB_CTRL_SETUP_STRAP_CC_DRD_MODE_ENABLE_SEL_MASK, > - USB_CTRL_USB_PM_USB20_HC_RESETB_VAR_MASK, > - ENDIAN_SETTINGS, /* USB_CTRL_SETUP ENDIAN bits */ > + [USB_CTRL_SETUP_SS_EHCI64BIT_EN_SELECTOR] = > + USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK, > + [USB_CTRL_SETUP_STRAP_IPP_SEL_SELECTOR] = > + USB_CTRL_SETUP_STRAP_IPP_SEL_MASK, > + [USB_CTRL_SETUP_OC3_DISABLE_PORT0_SELECTOR] = > + USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK, > + [USB_CTRL_SETUP_OC3_DISABLE_PORT1_SELECTOR] = > + USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK, > + [USB_CTRL_SETUP_OC3_DISABLE_SELECTOR] = > + USB_CTRL_SETUP_OC3_DISABLE_MASK, > + [USB_CTRL_USB_PM_BDC_SOFT_RESETB_SELECTOR] = > + USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK, > + [USB_CTRL_USB_PM_XHC_SOFT_RESETB_SELECTOR] = > + USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK, > + [USB_CTRL_USB_PM_USB_PWRDN_SELECTOR] = > + USB_CTRL_USB_PM_USB_PWRDN_MASK, > + [USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_SELECTOR] = > + USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK, > + [USB_CTRL_USB_PM_SOFT_RESET_SELECTOR] = > + USB_CTRL_USB_PM_SOFT_RESET_MASK, > + [USB_CTRL_SETUP_CC_DRD_MODE_ENABLE_SELECTOR] = > + USB_CTRL_SETUP_CC_DRD_MODE_ENABLE_MASK, > + [USB_CTRL_SETUP_STRAP_CC_DRD_MODE_ENABLE_SEL_SELECTOR] = > + USB_CTRL_SETUP_STRAP_CC_DRD_MODE_ENABLE_SEL_MASK, > + [USB_CTRL_USB_PM_USB20_HC_RESETB_SELECTOR] = > + USB_CTRL_USB_PM_USB20_HC_RESETB_VAR_MASK, > + [USB_CTRL_SETUP_ENDIAN_SELECTOR] = ENDIAN_SETTINGS, > }, > /* 7278a0 */ > [BRCM_FAMILY_7278A0] = { > - 0, /* USB_CTRL_SETUP_SCB1_EN_MASK */ > - 0, /* USB_CTRL_SETUP_SCB2_EN_MASK */ > - 0, /*USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK */ > - USB_CTRL_SETUP_STRAP_IPP_SEL_MASK, > - USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK, > - USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK, > - USB_CTRL_SETUP_OC3_DISABLE_MASK, > - 0, /* USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK */ > - USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK, > - USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK, > - USB_CTRL_USB_PM_USB_PWRDN_MASK, > - 0, /* USB_CTRL_USB30_CTL1_XHC_SOFT_RESETB_MASK */ > - 0, /* USB_CTRL_USB30_CTL1_USB3_IOC_MASK */ > - 0, /* USB_CTRL_USB30_CTL1_USB3_IPP_MASK */ > - USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK, > - USB_CTRL_USB_PM_SOFT_RESET_MASK, > - 0, /* USB_CTRL_SETUP_CC_DRD_MODE_ENABLE_MASK */ > - 0, /* USB_CTRL_SETUP_STRAP_CC_DRD_MODE_ENABLE_SEL_MASK */ > - 0, /* USB_CTRL_USB_PM_USB20_HC_RESETB_MASK */ > - 0, /* USB_CTRL_SETUP ENDIAN bits */ > + [USB_CTRL_SETUP_STRAP_IPP_SEL_SELECTOR] = > + USB_CTRL_SETUP_STRAP_IPP_SEL_MASK, > + [USB_CTRL_SETUP_OC3_DISABLE_PORT0_SELECTOR] = > + USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK, > + [USB_CTRL_SETUP_OC3_DISABLE_PORT1_SELECTOR] = > + USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK, > + [USB_CTRL_SETUP_OC3_DISABLE_SELECTOR] = > + USB_CTRL_SETUP_OC3_DISABLE_MASK, > + [USB_CTRL_USB_PM_BDC_SOFT_RESETB_SELECTOR] = > + USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK, > + [USB_CTRL_USB_PM_XHC_SOFT_RESETB_SELECTOR] = > + USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK, > + [USB_CTRL_USB_PM_USB_PWRDN_SELECTOR] = > + USB_CTRL_USB_PM_USB_PWRDN_MASK, > + [USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_SELECTOR] = > + USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK, > + [USB_CTRL_USB_PM_SOFT_RESET_SELECTOR] = > + USB_CTRL_USB_PM_SOFT_RESET_MASK, > }, > }; > -- linux-phy mailing list linux-phy@lists.infradead.org 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Message-ID: <054d62af-721d-40dd-9e95-e43d0579def5@broadcom.com> Date: Fri, 4 Oct 2024 16:35:11 -0700 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 2/2] phy: usb: update Broadcom driver table to use designated initializers To: Sam Edwards , Al Cooper Cc: Broadcom internal kernel review list , Vinod Koul , Kishon Vijay Abraham I , Florian Fainelli , linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org References: <20241004034131.1363813-1-CFSworks@gmail.com> <20241004034131.1363813-3-CFSworks@gmail.com> Content-Language: en-US From: Justin Chen In-Reply-To: <20241004034131.1363813-3-CFSworks@gmail.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 10/3/24 8:41 PM, Sam Edwards wrote: > The Broadcom USB PHY driver contains a lookup table > (`reg_bits_map_tables`) to resolve register bitmaps unique to certain > versions of the USB PHY as found in various Broadcom chip families. > Historically, this table was just kept carefully in sync with the > "selector" enum every time the latter changed to ensure consistency. > However, a recent commit [1] introduced two new enumerators but did not > adjust the array for BCM4908, thus breaking the xHCI controller (and > boot process) on this platform and revealing the fragility of this > approach. > > Since these arrays are a little sparse (many elements are zero) and the > position of the array elements is significant only insofar as they agree > with the enumerators, designated initializers are a better fit than > positional initializers here. Convert this table accordingly. > > [1] 4536fe9640b6 ("phy: usb: suppress OC condition for 7439b2") > > Signed-off-by: Sam Edwards Reviewed-by: Justin Chen > --- > drivers/phy/broadcom/phy-brcm-usb-init.c | 435 +++++++++++------------ > 1 file changed, 215 insertions(+), 220 deletions(-) > > diff --git a/drivers/phy/broadcom/phy-brcm-usb-init.c b/drivers/phy/broadcom/phy-brcm-usb-init.c > index 5ebb3a616115..da23078878a9 100644 > --- a/drivers/phy/broadcom/phy-brcm-usb-init.c > +++ b/drivers/phy/broadcom/phy-brcm-usb-init.c > @@ -193,256 +193,251 @@ static const u32 > usb_reg_bits_map_table[BRCM_FAMILY_COUNT][USB_CTRL_SELECTOR_COUNT] = { > /* 3390B0 */ > [BRCM_FAMILY_3390A0] = { > - USB_CTRL_SETUP_SCB1_EN_MASK, > - USB_CTRL_SETUP_SCB2_EN_MASK, > - USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK, > - USB_CTRL_SETUP_STRAP_IPP_SEL_MASK, > - USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK, > - USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK, > - USB_CTRL_SETUP_OC3_DISABLE_MASK, > - 0, /* USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK */ > - 0, /* USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK */ > - USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK, > - USB_CTRL_USB_PM_USB_PWRDN_MASK, > - 0, /* USB_CTRL_USB30_CTL1_XHC_SOFT_RESETB_MASK */ > - 0, /* USB_CTRL_USB30_CTL1_USB3_IOC_MASK */ > - 0, /* USB_CTRL_USB30_CTL1_USB3_IPP_MASK */ > - USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK, > - 0, /* USB_CTRL_USB_PM_SOFT_RESET_MASK */ > - 0, /* USB_CTRL_SETUP_CC_DRD_MODE_ENABLE_MASK */ > - 0, /* USB_CTRL_SETUP_STRAP_CC_DRD_MODE_ENABLE_SEL_MASK */ > - USB_CTRL_USB_PM_USB20_HC_RESETB_VAR_MASK, > - ENDIAN_SETTINGS, /* USB_CTRL_SETUP ENDIAN bits */ > + [USB_CTRL_SETUP_SCB1_EN_SELECTOR] = > + USB_CTRL_SETUP_SCB1_EN_MASK, > + [USB_CTRL_SETUP_SCB2_EN_SELECTOR] = > + USB_CTRL_SETUP_SCB2_EN_MASK, > + [USB_CTRL_SETUP_SS_EHCI64BIT_EN_SELECTOR] = > + USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK, > + [USB_CTRL_SETUP_STRAP_IPP_SEL_SELECTOR] = > + USB_CTRL_SETUP_STRAP_IPP_SEL_MASK, > + [USB_CTRL_SETUP_OC3_DISABLE_PORT0_SELECTOR] = > + USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK, > + [USB_CTRL_SETUP_OC3_DISABLE_PORT1_SELECTOR] = > + USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK, > + [USB_CTRL_SETUP_OC3_DISABLE_SELECTOR] = > + USB_CTRL_SETUP_OC3_DISABLE_MASK, > + [USB_CTRL_USB_PM_XHC_SOFT_RESETB_SELECTOR] = > + USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK, > + [USB_CTRL_USB_PM_USB_PWRDN_SELECTOR] = > + USB_CTRL_USB_PM_USB_PWRDN_MASK, > + [USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_SELECTOR] = > + USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK, > + [USB_CTRL_USB_PM_USB20_HC_RESETB_SELECTOR] = > + USB_CTRL_USB_PM_USB20_HC_RESETB_VAR_MASK, > + [USB_CTRL_SETUP_ENDIAN_SELECTOR] = ENDIAN_SETTINGS, > }, > /* 4908 */ > [BRCM_FAMILY_4908] = { > - 0, /* USB_CTRL_SETUP_SCB1_EN_MASK */ > - 0, /* USB_CTRL_SETUP_SCB2_EN_MASK */ > - 0, /* USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK */ > - 0, /* USB_CTRL_SETUP_STRAP_IPP_SEL_MASK */ > - 0, /* USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK */ > - 0, /* USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK */ > - 0, /* USB_CTRL_SETUP_OC3_DISABLE_MASK */ > - 0, /* USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK */ > - 0, /* USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK */ > - USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK, > - USB_CTRL_USB_PM_USB_PWRDN_MASK, > - 0, /* USB_CTRL_USB30_CTL1_XHC_SOFT_RESETB_MASK */ > - 0, /* USB_CTRL_USB30_CTL1_USB3_IOC_MASK */ > - 0, /* USB_CTRL_USB30_CTL1_USB3_IPP_MASK */ > - 0, /* USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK */ > - 0, /* USB_CTRL_USB_PM_SOFT_RESET_MASK */ > - 0, /* USB_CTRL_SETUP_CC_DRD_MODE_ENABLE_MASK */ > - 0, /* USB_CTRL_SETUP_STRAP_CC_DRD_MODE_ENABLE_SEL_MASK */ > - 0, /* USB_CTRL_USB_PM_USB20_HC_RESETB_VAR_MASK */ > - 0, /* USB_CTRL_SETUP ENDIAN bits */ > + [USB_CTRL_USB_PM_XHC_SOFT_RESETB_SELECTOR] = > + USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK, > + [USB_CTRL_USB_PM_USB_PWRDN_SELECTOR] = > + USB_CTRL_USB_PM_USB_PWRDN_MASK, > }, > /* 7250b0 */ > [BRCM_FAMILY_7250B0] = { > - USB_CTRL_SETUP_SCB1_EN_MASK, > - USB_CTRL_SETUP_SCB2_EN_MASK, > - USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK, > - 0, /* USB_CTRL_SETUP_STRAP_IPP_SEL_MASK */ > - USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK, > - USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK, > - USB_CTRL_SETUP_OC3_DISABLE_MASK, > - USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK, > - 0, /* USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK */ > - USB_CTRL_USB_PM_XHC_SOFT_RESETB_VAR_MASK, > - 0, /* USB_CTRL_USB_PM_USB_PWRDN_MASK */ > - 0, /* USB_CTRL_USB30_CTL1_XHC_SOFT_RESETB_MASK */ > - 0, /* USB_CTRL_USB30_CTL1_USB3_IOC_MASK */ > - 0, /* USB_CTRL_USB30_CTL1_USB3_IPP_MASK */ > - 0, /* USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK */ > - 0, /* USB_CTRL_USB_PM_SOFT_RESET_MASK */ > - 0, /* USB_CTRL_SETUP_CC_DRD_MODE_ENABLE_MASK */ > - 0, /* USB_CTRL_SETUP_STRAP_CC_DRD_MODE_ENABLE_SEL_MASK */ > - USB_CTRL_USB_PM_USB20_HC_RESETB_MASK, > - ENDIAN_SETTINGS, /* USB_CTRL_SETUP ENDIAN bits */ > + [USB_CTRL_SETUP_SCB1_EN_SELECTOR] = > + USB_CTRL_SETUP_SCB1_EN_MASK, > + [USB_CTRL_SETUP_SCB2_EN_SELECTOR] = > + USB_CTRL_SETUP_SCB2_EN_MASK, > + [USB_CTRL_SETUP_SS_EHCI64BIT_EN_SELECTOR] = > + USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK, > + [USB_CTRL_SETUP_OC3_DISABLE_PORT0_SELECTOR] = > + USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK, > + [USB_CTRL_SETUP_OC3_DISABLE_PORT1_SELECTOR] = > + USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK, > + [USB_CTRL_SETUP_OC3_DISABLE_SELECTOR] = > + USB_CTRL_SETUP_OC3_DISABLE_MASK, > + [USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_SELECTOR] = > + USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK, > + [USB_CTRL_USB_PM_XHC_SOFT_RESETB_SELECTOR] = > + USB_CTRL_USB_PM_XHC_SOFT_RESETB_VAR_MASK, > + [USB_CTRL_USB_PM_USB20_HC_RESETB_SELECTOR] = > + USB_CTRL_USB_PM_USB20_HC_RESETB_MASK, > + [USB_CTRL_SETUP_ENDIAN_SELECTOR] = ENDIAN_SETTINGS, > }, > /* 7271a0 */ > [BRCM_FAMILY_7271A0] = { > - 0, /* USB_CTRL_SETUP_SCB1_EN_MASK */ > - 0, /* USB_CTRL_SETUP_SCB2_EN_MASK */ > - USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK, > - USB_CTRL_SETUP_STRAP_IPP_SEL_MASK, > - USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK, > - USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK, > - USB_CTRL_SETUP_OC3_DISABLE_MASK, > - 0, /* USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK */ > - USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK, > - USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK, > - USB_CTRL_USB_PM_USB_PWRDN_MASK, > - 0, /* USB_CTRL_USB30_CTL1_XHC_SOFT_RESETB_MASK */ > - 0, /* USB_CTRL_USB30_CTL1_USB3_IOC_MASK */ > - 0, /* USB_CTRL_USB30_CTL1_USB3_IPP_MASK */ > - USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK, > - USB_CTRL_USB_PM_SOFT_RESET_MASK, > - USB_CTRL_SETUP_CC_DRD_MODE_ENABLE_MASK, > - USB_CTRL_SETUP_STRAP_CC_DRD_MODE_ENABLE_SEL_MASK, > - USB_CTRL_USB_PM_USB20_HC_RESETB_VAR_MASK, > - ENDIAN_SETTINGS, /* USB_CTRL_SETUP ENDIAN bits */ > + [USB_CTRL_SETUP_SS_EHCI64BIT_EN_SELECTOR] = > + USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK, > + [USB_CTRL_SETUP_STRAP_IPP_SEL_SELECTOR] = > + USB_CTRL_SETUP_STRAP_IPP_SEL_MASK, > + [USB_CTRL_SETUP_OC3_DISABLE_PORT0_SELECTOR] = > + USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK, > + [USB_CTRL_SETUP_OC3_DISABLE_PORT1_SELECTOR] = > + USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK, > + [USB_CTRL_SETUP_OC3_DISABLE_SELECTOR] = > + USB_CTRL_SETUP_OC3_DISABLE_MASK, > + [USB_CTRL_USB_PM_BDC_SOFT_RESETB_SELECTOR] = > + USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK, > + [USB_CTRL_USB_PM_XHC_SOFT_RESETB_SELECTOR] = > + USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK, > + [USB_CTRL_USB_PM_USB_PWRDN_SELECTOR] = > + USB_CTRL_USB_PM_USB_PWRDN_MASK, > + [USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_SELECTOR] = > + USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK, > + [USB_CTRL_USB_PM_SOFT_RESET_SELECTOR] = > + USB_CTRL_USB_PM_SOFT_RESET_MASK, > + [USB_CTRL_SETUP_CC_DRD_MODE_ENABLE_SELECTOR] = > + USB_CTRL_SETUP_CC_DRD_MODE_ENABLE_MASK, > + [USB_CTRL_SETUP_STRAP_CC_DRD_MODE_ENABLE_SEL_SELECTOR] = > + USB_CTRL_SETUP_STRAP_CC_DRD_MODE_ENABLE_SEL_MASK, > + [USB_CTRL_USB_PM_USB20_HC_RESETB_SELECTOR] = > + USB_CTRL_USB_PM_USB20_HC_RESETB_VAR_MASK, > + [USB_CTRL_SETUP_ENDIAN_SELECTOR] = ENDIAN_SETTINGS, > }, > /* 7364a0 */ > [BRCM_FAMILY_7364A0] = { > - USB_CTRL_SETUP_SCB1_EN_MASK, > - USB_CTRL_SETUP_SCB2_EN_MASK, > - USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK, > - 0, /* USB_CTRL_SETUP_STRAP_IPP_SEL_MASK */ > - USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK, > - USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK, > - USB_CTRL_SETUP_OC3_DISABLE_MASK, > - USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK, > - 0, /* USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK */ > - USB_CTRL_USB_PM_XHC_SOFT_RESETB_VAR_MASK, > - 0, /* USB_CTRL_USB_PM_USB_PWRDN_MASK */ > - 0, /* USB_CTRL_USB30_CTL1_XHC_SOFT_RESETB_MASK */ > - 0, /* USB_CTRL_USB30_CTL1_USB3_IOC_MASK */ > - 0, /* USB_CTRL_USB30_CTL1_USB3_IPP_MASK */ > - 0, /* USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK */ > - 0, /* USB_CTRL_USB_PM_SOFT_RESET_MASK */ > - 0, /* USB_CTRL_SETUP_CC_DRD_MODE_ENABLE_MASK */ > - 0, /* USB_CTRL_SETUP_STRAP_CC_DRD_MODE_ENABLE_SEL_MASK */ > - USB_CTRL_USB_PM_USB20_HC_RESETB_MASK, > - ENDIAN_SETTINGS, /* USB_CTRL_SETUP ENDIAN bits */ > + [USB_CTRL_SETUP_SCB1_EN_SELECTOR] = > + USB_CTRL_SETUP_SCB1_EN_MASK, > + [USB_CTRL_SETUP_SCB2_EN_SELECTOR] = > + USB_CTRL_SETUP_SCB2_EN_MASK, > + [USB_CTRL_SETUP_SS_EHCI64BIT_EN_SELECTOR] = > + USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK, > + [USB_CTRL_SETUP_OC3_DISABLE_PORT0_SELECTOR] = > + USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK, > + [USB_CTRL_SETUP_OC3_DISABLE_PORT1_SELECTOR] = > + USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK, > + [USB_CTRL_SETUP_OC3_DISABLE_SELECTOR] = > + USB_CTRL_SETUP_OC3_DISABLE_MASK, > + [USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_SELECTOR] = > + USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK, > + [USB_CTRL_USB_PM_XHC_SOFT_RESETB_SELECTOR] = > + USB_CTRL_USB_PM_XHC_SOFT_RESETB_VAR_MASK, > + [USB_CTRL_USB_PM_USB20_HC_RESETB_SELECTOR] = > + USB_CTRL_USB_PM_USB20_HC_RESETB_MASK, > + [USB_CTRL_SETUP_ENDIAN_SELECTOR] = ENDIAN_SETTINGS, > }, > /* 7366c0 */ > [BRCM_FAMILY_7366C0] = { > - USB_CTRL_SETUP_SCB1_EN_MASK, > - USB_CTRL_SETUP_SCB2_EN_MASK, > - USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK, > - 0, /* USB_CTRL_SETUP_STRAP_IPP_SEL_MASK */ > - USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK, > - USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK, > - USB_CTRL_SETUP_OC3_DISABLE_MASK, > - 0, /* USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK */ > - 0, /* USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK */ > - USB_CTRL_USB_PM_XHC_SOFT_RESETB_VAR_MASK, > - USB_CTRL_USB_PM_USB_PWRDN_MASK, > - 0, /* USB_CTRL_USB30_CTL1_XHC_SOFT_RESETB_MASK */ > - 0, /* USB_CTRL_USB30_CTL1_USB3_IOC_MASK */ > - 0, /* USB_CTRL_USB30_CTL1_USB3_IPP_MASK */ > - 0, /* USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK */ > - 0, /* USB_CTRL_USB_PM_SOFT_RESET_MASK */ > - 0, /* USB_CTRL_SETUP_CC_DRD_MODE_ENABLE_MASK */ > - 0, /* USB_CTRL_SETUP_STRAP_CC_DRD_MODE_ENABLE_SEL_MASK */ > - USB_CTRL_USB_PM_USB20_HC_RESETB_MASK, > - ENDIAN_SETTINGS, /* USB_CTRL_SETUP ENDIAN bits */ > + [USB_CTRL_SETUP_SCB1_EN_SELECTOR] = > + USB_CTRL_SETUP_SCB1_EN_MASK, > + [USB_CTRL_SETUP_SCB2_EN_SELECTOR] = > + USB_CTRL_SETUP_SCB2_EN_MASK, > + [USB_CTRL_SETUP_SS_EHCI64BIT_EN_SELECTOR] = > + USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK, > + [USB_CTRL_SETUP_OC3_DISABLE_PORT0_SELECTOR] = > + USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK, > + [USB_CTRL_SETUP_OC3_DISABLE_PORT1_SELECTOR] = > + USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK, > + [USB_CTRL_SETUP_OC3_DISABLE_SELECTOR] = > + USB_CTRL_SETUP_OC3_DISABLE_MASK, > + [USB_CTRL_USB_PM_XHC_SOFT_RESETB_SELECTOR] = > + USB_CTRL_USB_PM_XHC_SOFT_RESETB_VAR_MASK, > + [USB_CTRL_USB_PM_USB_PWRDN_SELECTOR] = > + USB_CTRL_USB_PM_USB_PWRDN_MASK, > + [USB_CTRL_USB_PM_USB20_HC_RESETB_SELECTOR] = > + USB_CTRL_USB_PM_USB20_HC_RESETB_MASK, > + [USB_CTRL_SETUP_ENDIAN_SELECTOR] = ENDIAN_SETTINGS, > }, > /* 74371A0 */ > [BRCM_FAMILY_74371A0] = { > - USB_CTRL_SETUP_SCB1_EN_MASK, > - USB_CTRL_SETUP_SCB2_EN_MASK, > - USB_CTRL_SETUP_SS_EHCI64BIT_EN_VAR_MASK, > - 0, /* USB_CTRL_SETUP_STRAP_IPP_SEL_MASK */ > - 0, /* USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK */ > - 0, /* USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK */ > - 0, /* USB_CTRL_SETUP_OC3_DISABLE_MASK */ > - USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK, > - 0, /* USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK */ > - 0, /* USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK */ > - 0, /* USB_CTRL_USB_PM_USB_PWRDN_MASK */ > - USB_CTRL_USB30_CTL1_XHC_SOFT_RESETB_MASK, > - USB_CTRL_USB30_CTL1_USB3_IOC_MASK, > - USB_CTRL_USB30_CTL1_USB3_IPP_MASK, > - 0, /* USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK */ > - 0, /* USB_CTRL_USB_PM_SOFT_RESET_MASK */ > - 0, /* USB_CTRL_SETUP_CC_DRD_MODE_ENABLE_MASK */ > - 0, /* USB_CTRL_SETUP_STRAP_CC_DRD_MODE_ENABLE_SEL_MASK */ > - 0, /* USB_CTRL_USB_PM_USB20_HC_RESETB_MASK */ > - ENDIAN_SETTINGS, /* USB_CTRL_SETUP ENDIAN bits */ > + [USB_CTRL_SETUP_SCB1_EN_SELECTOR] = > + USB_CTRL_SETUP_SCB1_EN_MASK, > + [USB_CTRL_SETUP_SCB2_EN_SELECTOR] = > + USB_CTRL_SETUP_SCB2_EN_MASK, > + [USB_CTRL_SETUP_SS_EHCI64BIT_EN_SELECTOR] = > + USB_CTRL_SETUP_SS_EHCI64BIT_EN_VAR_MASK, > + [USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_SELECTOR] = > + USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK, > + [USB_CTRL_USB30_CTL1_XHC_SOFT_RESETB_SELECTOR] = > + USB_CTRL_USB30_CTL1_XHC_SOFT_RESETB_MASK, > + [USB_CTRL_USB30_CTL1_USB3_IOC_SELECTOR] = > + USB_CTRL_USB30_CTL1_USB3_IOC_MASK, > + [USB_CTRL_USB30_CTL1_USB3_IPP_SELECTOR] = > + USB_CTRL_USB30_CTL1_USB3_IPP_MASK, > + [USB_CTRL_SETUP_ENDIAN_SELECTOR] = ENDIAN_SETTINGS, > }, > /* 7439B0 */ > [BRCM_FAMILY_7439B0] = { > - USB_CTRL_SETUP_SCB1_EN_MASK, > - USB_CTRL_SETUP_SCB2_EN_MASK, > - USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK, > - USB_CTRL_SETUP_STRAP_IPP_SEL_MASK, > - USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK, > - USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK, > - USB_CTRL_SETUP_OC3_DISABLE_MASK, > - 0, /* USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK */ > - USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK, > - USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK, > - USB_CTRL_USB_PM_USB_PWRDN_MASK, > - 0, /* USB_CTRL_USB30_CTL1_XHC_SOFT_RESETB_MASK */ > - 0, /* USB_CTRL_USB30_CTL1_USB3_IOC_MASK */ > - 0, /* USB_CTRL_USB30_CTL1_USB3_IPP_MASK */ > - USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK, > - 0, /* USB_CTRL_USB_PM_SOFT_RESET_MASK */ > - 0, /* USB_CTRL_SETUP_CC_DRD_MODE_ENABLE_MASK */ > - 0, /* USB_CTRL_SETUP_STRAP_CC_DRD_MODE_ENABLE_SEL_MASK */ > - USB_CTRL_USB_PM_USB20_HC_RESETB_VAR_MASK, > - ENDIAN_SETTINGS, /* USB_CTRL_SETUP ENDIAN bits */ > + [USB_CTRL_SETUP_SCB1_EN_SELECTOR] = > + USB_CTRL_SETUP_SCB1_EN_MASK, > + [USB_CTRL_SETUP_SCB2_EN_SELECTOR] = > + USB_CTRL_SETUP_SCB2_EN_MASK, > + [USB_CTRL_SETUP_SS_EHCI64BIT_EN_SELECTOR] = > + USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK, > + [USB_CTRL_SETUP_STRAP_IPP_SEL_SELECTOR] = > + USB_CTRL_SETUP_STRAP_IPP_SEL_MASK, > + [USB_CTRL_SETUP_OC3_DISABLE_PORT0_SELECTOR] = > + USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK, > + [USB_CTRL_SETUP_OC3_DISABLE_PORT1_SELECTOR] = > + USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK, > + [USB_CTRL_SETUP_OC3_DISABLE_SELECTOR] = > + USB_CTRL_SETUP_OC3_DISABLE_MASK, > + [USB_CTRL_USB_PM_BDC_SOFT_RESETB_SELECTOR] = > + USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK, > + [USB_CTRL_USB_PM_XHC_SOFT_RESETB_SELECTOR] = > + USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK, > + [USB_CTRL_USB_PM_USB_PWRDN_SELECTOR] = > + USB_CTRL_USB_PM_USB_PWRDN_MASK, > + [USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_SELECTOR] = > + USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK, > + [USB_CTRL_USB_PM_USB20_HC_RESETB_SELECTOR] = > + USB_CTRL_USB_PM_USB20_HC_RESETB_VAR_MASK, > + [USB_CTRL_SETUP_ENDIAN_SELECTOR] = ENDIAN_SETTINGS, > }, > /* 7445d0 */ > [BRCM_FAMILY_7445D0] = { > - USB_CTRL_SETUP_SCB1_EN_MASK, > - USB_CTRL_SETUP_SCB2_EN_MASK, > - USB_CTRL_SETUP_SS_EHCI64BIT_EN_VAR_MASK, > - 0, /* USB_CTRL_SETUP_STRAP_IPP_SEL_MASK */ > - USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK, > - USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK, > - USB_CTRL_SETUP_OC3_DISABLE_MASK, > - USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK, > - 0, /* USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK */ > - 0, /* USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK */ > - 0, /* USB_CTRL_USB_PM_USB_PWRDN_MASK */ > - USB_CTRL_USB30_CTL1_XHC_SOFT_RESETB_MASK, > - 0, /* USB_CTRL_USB30_CTL1_USB3_IOC_MASK */ > - 0, /* USB_CTRL_USB30_CTL1_USB3_IPP_MASK */ > - 0, /* USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK */ > - 0, /* USB_CTRL_USB_PM_SOFT_RESET_MASK */ > - 0, /* USB_CTRL_SETUP_CC_DRD_MODE_ENABLE_MASK */ > - 0, /* USB_CTRL_SETUP_STRAP_CC_DRD_MODE_ENABLE_SEL_MASK */ > - USB_CTRL_USB_PM_USB20_HC_RESETB_VAR_MASK, > - ENDIAN_SETTINGS, /* USB_CTRL_SETUP ENDIAN bits */ > + [USB_CTRL_SETUP_SCB1_EN_SELECTOR] = > + USB_CTRL_SETUP_SCB1_EN_MASK, > + [USB_CTRL_SETUP_SCB2_EN_SELECTOR] = > + USB_CTRL_SETUP_SCB2_EN_MASK, > + [USB_CTRL_SETUP_SS_EHCI64BIT_EN_SELECTOR] = > + USB_CTRL_SETUP_SS_EHCI64BIT_EN_VAR_MASK, > + [USB_CTRL_SETUP_OC3_DISABLE_PORT0_SELECTOR] = > + USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK, > + [USB_CTRL_SETUP_OC3_DISABLE_PORT1_SELECTOR] = > + USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK, > + [USB_CTRL_SETUP_OC3_DISABLE_SELECTOR] = > + USB_CTRL_SETUP_OC3_DISABLE_MASK, > + [USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_SELECTOR] = > + USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK, > + [USB_CTRL_USB30_CTL1_XHC_SOFT_RESETB_SELECTOR] = > + USB_CTRL_USB30_CTL1_XHC_SOFT_RESETB_MASK, > + [USB_CTRL_USB_PM_USB20_HC_RESETB_SELECTOR] = > + USB_CTRL_USB_PM_USB20_HC_RESETB_VAR_MASK, > + [USB_CTRL_SETUP_ENDIAN_SELECTOR] = ENDIAN_SETTINGS, > }, > /* 7260a0 */ > [BRCM_FAMILY_7260A0] = { > - 0, /* USB_CTRL_SETUP_SCB1_EN_MASK */ > - 0, /* USB_CTRL_SETUP_SCB2_EN_MASK */ > - USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK, > - USB_CTRL_SETUP_STRAP_IPP_SEL_MASK, > - USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK, > - USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK, > - USB_CTRL_SETUP_OC3_DISABLE_MASK, > - 0, /* USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK */ > - USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK, > - USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK, > - USB_CTRL_USB_PM_USB_PWRDN_MASK, > - 0, /* USB_CTRL_USB30_CTL1_XHC_SOFT_RESETB_MASK */ > - 0, /* USB_CTRL_USB30_CTL1_USB3_IOC_MASK */ > - 0, /* USB_CTRL_USB30_CTL1_USB3_IPP_MASK */ > - USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK, > - USB_CTRL_USB_PM_SOFT_RESET_MASK, > - USB_CTRL_SETUP_CC_DRD_MODE_ENABLE_MASK, > - USB_CTRL_SETUP_STRAP_CC_DRD_MODE_ENABLE_SEL_MASK, > - USB_CTRL_USB_PM_USB20_HC_RESETB_VAR_MASK, > - ENDIAN_SETTINGS, /* USB_CTRL_SETUP ENDIAN bits */ > + [USB_CTRL_SETUP_SS_EHCI64BIT_EN_SELECTOR] = > + USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK, > + [USB_CTRL_SETUP_STRAP_IPP_SEL_SELECTOR] = > + USB_CTRL_SETUP_STRAP_IPP_SEL_MASK, > + [USB_CTRL_SETUP_OC3_DISABLE_PORT0_SELECTOR] = > + USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK, > + [USB_CTRL_SETUP_OC3_DISABLE_PORT1_SELECTOR] = > + USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK, > + [USB_CTRL_SETUP_OC3_DISABLE_SELECTOR] = > + USB_CTRL_SETUP_OC3_DISABLE_MASK, > + [USB_CTRL_USB_PM_BDC_SOFT_RESETB_SELECTOR] = > + USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK, > + [USB_CTRL_USB_PM_XHC_SOFT_RESETB_SELECTOR] = > + USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK, > + [USB_CTRL_USB_PM_USB_PWRDN_SELECTOR] = > + USB_CTRL_USB_PM_USB_PWRDN_MASK, > + [USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_SELECTOR] = > + USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK, > + [USB_CTRL_USB_PM_SOFT_RESET_SELECTOR] = > + USB_CTRL_USB_PM_SOFT_RESET_MASK, > + [USB_CTRL_SETUP_CC_DRD_MODE_ENABLE_SELECTOR] = > + USB_CTRL_SETUP_CC_DRD_MODE_ENABLE_MASK, > + [USB_CTRL_SETUP_STRAP_CC_DRD_MODE_ENABLE_SEL_SELECTOR] = > + USB_CTRL_SETUP_STRAP_CC_DRD_MODE_ENABLE_SEL_MASK, > + [USB_CTRL_USB_PM_USB20_HC_RESETB_SELECTOR] = > + USB_CTRL_USB_PM_USB20_HC_RESETB_VAR_MASK, > + [USB_CTRL_SETUP_ENDIAN_SELECTOR] = ENDIAN_SETTINGS, > }, > /* 7278a0 */ > [BRCM_FAMILY_7278A0] = { > - 0, /* USB_CTRL_SETUP_SCB1_EN_MASK */ > - 0, /* USB_CTRL_SETUP_SCB2_EN_MASK */ > - 0, /*USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK */ > - USB_CTRL_SETUP_STRAP_IPP_SEL_MASK, > - USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK, > - USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK, > - USB_CTRL_SETUP_OC3_DISABLE_MASK, > - 0, /* USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK */ > - USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK, > - USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK, > - USB_CTRL_USB_PM_USB_PWRDN_MASK, > - 0, /* USB_CTRL_USB30_CTL1_XHC_SOFT_RESETB_MASK */ > - 0, /* USB_CTRL_USB30_CTL1_USB3_IOC_MASK */ > - 0, /* USB_CTRL_USB30_CTL1_USB3_IPP_MASK */ > - USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK, > - USB_CTRL_USB_PM_SOFT_RESET_MASK, > - 0, /* USB_CTRL_SETUP_CC_DRD_MODE_ENABLE_MASK */ > - 0, /* USB_CTRL_SETUP_STRAP_CC_DRD_MODE_ENABLE_SEL_MASK */ > - 0, /* USB_CTRL_USB_PM_USB20_HC_RESETB_MASK */ > - 0, /* USB_CTRL_SETUP ENDIAN bits */ > + [USB_CTRL_SETUP_STRAP_IPP_SEL_SELECTOR] = > + USB_CTRL_SETUP_STRAP_IPP_SEL_MASK, > + [USB_CTRL_SETUP_OC3_DISABLE_PORT0_SELECTOR] = > + USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK, > + [USB_CTRL_SETUP_OC3_DISABLE_PORT1_SELECTOR] = > + USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK, > + [USB_CTRL_SETUP_OC3_DISABLE_SELECTOR] = > + USB_CTRL_SETUP_OC3_DISABLE_MASK, > + [USB_CTRL_USB_PM_BDC_SOFT_RESETB_SELECTOR] = > + USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK, > + [USB_CTRL_USB_PM_XHC_SOFT_RESETB_SELECTOR] = > + USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK, > + [USB_CTRL_USB_PM_USB_PWRDN_SELECTOR] = > + USB_CTRL_USB_PM_USB_PWRDN_MASK, > + [USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_SELECTOR] = > + USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK, > + [USB_CTRL_USB_PM_SOFT_RESET_SELECTOR] = > + USB_CTRL_USB_PM_SOFT_RESET_MASK, > }, > }; >