Re: [PATCH v2 2/3] irqchip: dw-apb-ictl: support hierarchy irq domain

[Marc Zyngier <maz@kernel.org>]

On 2020-09-08 10:40, Leizhen (ThunderTown) wrote:
> On 2020/9/8 15:41, Marc Zyngier wrote:
>> On 2020-09-08 08:11, Zhen Lei wrote:
>>> Add support to use dw-apb-ictl as primary interrupt controller.
>>> 
>>> Suggested-by: Marc Zyngier <maz@kernel.org>
>>> Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
>>> Tested-by: Haoyu Lv <lvhaoyu@huawei.com>
>>> ---
>>>  drivers/irqchip/Kconfig           |  2 +-
>>>  drivers/irqchip/irq-dw-apb-ictl.c | 75 
>>> +++++++++++++++++++++++++++++--
>>>  2 files changed, 73 insertions(+), 4 deletions(-)
>>> 
>>> diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
>>> index bfc9719dbcdc..7c2d1c8fa551 100644
>>> --- a/drivers/irqchip/Kconfig
>>> +++ b/drivers/irqchip/Kconfig
>>> @@ -148,7 +148,7 @@ config DAVINCI_CP_INTC
>>>  config DW_APB_ICTL
>>>      bool
>>>      select GENERIC_IRQ_CHIP
>>> -    select IRQ_DOMAIN
>>> +    select IRQ_DOMAIN_HIERARCHY
>>> 
>>>  config FARADAY_FTINTC010
>>>      bool
>>> diff --git a/drivers/irqchip/irq-dw-apb-ictl.c
>>> b/drivers/irqchip/irq-dw-apb-ictl.c
>>> index aa6214da0b1f..405861322596 100644
>>> --- a/drivers/irqchip/irq-dw-apb-ictl.c
>>> +++ b/drivers/irqchip/irq-dw-apb-ictl.c
>>> @@ -17,6 +17,7 @@
>>>  #include <linux/irqchip/chained_irq.h>
>>>  #include <linux/of_address.h>
>>>  #include <linux/of_irq.h>
>>> +#include <asm/exception.h>
>>> 
>>>  #define APB_INT_ENABLE_L    0x00
>>>  #define APB_INT_ENABLE_H    0x04
>>> @@ -26,6 +27,30 @@
>>>  #define APB_INT_FINALSTATUS_H    0x34
>>>  #define APB_INT_BASE_OFFSET    0x04
>>> 
>>> +/*
>>> + * irq domain of the primary interrupt controller. Currently, only 
>>> one is
>>> + * supported.
>> 
>> By definition, there is only one primary interrupt controller.
> 
> OK, I will delete the comment "Currently, only one is supported".
> Should I replace it with your commend above?

No, just delete it.

Thanks,

         M.
-- 
Jazz is not dead. It just smells funny...