From: Michael Walle <mwalle@kernel.org>
To: Jaime Liao <jaimeliao.tw@gmail.com>
Cc: linux-mtd@lists.infradead.org, tudor.ambarus@linaro.org,
pratyush@kernel.org, miquel.raynal@bootlin.com,
leoyu@mxic.com.tw, JaimeLiao <jaimeliao@mxic.com.tw>
Subject: Re: [PATCH v3 1/5] mtd: spi-nor: add Octal DTR support for Macronix flash
Date: Mon, 07 Aug 2023 08:44:24 +0200 [thread overview]
Message-ID: <06cb1125f82c36aedcbf7339ddeb166a@kernel.org> (raw)
In-Reply-To: <20230804095409.278419-2-jaimeliao.tw@gmail.com>
Hi,
> + /* Macronix SPI-NOR flash 8D-8D-8D read ID would get 6 bytes data
> A-A-B-B-C-C */
> + for (i = 0; i < nor->info->id_len; i++)
> + if (buf[i * 2] != nor->info->id[i])
> + return -EINVAL;
Still wrong. See comments on previous version.
-michael
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next prev parent reply other threads:[~2023-08-07 6:44 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-04 9:54 [PATCH v3 0/5] Add octal DTR support for Macronix flash Jaime Liao
2023-08-04 9:54 ` [PATCH v3 1/5] mtd: spi-nor: add Octal " Jaime Liao
2023-08-07 6:44 ` Michael Walle [this message]
2023-08-04 9:54 ` [PATCH v3 2/5] mtd: spi-nor: core: Hook manufacture by checking first byte ID Jaime Liao
2023-08-07 6:37 ` Michael Walle
2023-08-09 1:04 ` liao jaime
2023-08-10 7:27 ` Michael Walle
2023-08-11 9:03 ` liao jaime
2023-08-11 10:11 ` Tudor Ambarus
2023-08-14 8:04 ` liao jaime
2023-08-11 10:20 ` Michael Walle
2023-08-14 8:24 ` liao jaime
2023-08-31 3:18 ` liao jaime
2023-09-04 14:54 ` Michael Walle
2023-08-04 9:54 ` [PATCH v3 3/5] spi: spi-mem: Allow specifying the byte order in DTR mode Jaime Liao
2023-08-07 6:40 ` Michael Walle
2023-08-09 1:36 ` liao jaime
2023-08-10 7:31 ` Michael Walle
2023-08-04 9:54 ` [PATCH v3 4/5] mtd: spi-nor: core: " Jaime Liao
2023-08-04 9:54 ` [PATCH v3 5/5] mtd: spi-nor: sfdp: Get the 8D-8D-8D byte order from BFPT Jaime Liao
2023-08-07 6:42 ` [PATCH v3 0/5] Add octal DTR support for Macronix flash Michael Walle
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