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Fri, 06 Jun 2025 02:02:58 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA04.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 55622vWn026444 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 6 Jun 2025 02:02:57 GMT Received: from [10.231.195.67] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 5 Jun 2025 19:02:55 -0700 Message-ID: <06daee91-709e-4a98-b7ff-8233d33877b9@quicinc.com> Date: Fri, 6 Jun 2025 10:02:52 +0800 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/3] wifi: ath11k: fix dest ring-buffer corruption To: Miaoqing Pan , Johan Hovold CC: Jeff Johnson , Johan Hovold , Jeff Johnson , , , , References: <20250526114803.2122-1-johan+linaro@kernel.org> <20250526114803.2122-2-johan+linaro@kernel.org> <026b710f-b50f-4302-ad4f-36932c2558ff@quicinc.com> <5268c9ba-16cf-4d3a-87df-bbe0ddd3d584@quicinc.com> <01634993-80b1-496e-8453-e94b2efe658c@quicinc.com> <50555c1a-c200-4ac0-8dfb-424ff121b41d@oss.qualcomm.com> <03354d56-ed21-47e0-a52e-14f559ff3bfb@quicinc.com> Content-Language: en-US From: Baochen Qiang In-Reply-To: Content-Type: text/plain; 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On my platform, dma_rmb() did not work as expected. The issue >>>>>> only disappeared after disabling PCIe endpoint relaxed ordering in >>>>>> firmware side. So it seems that HP was updated (Memory write) before >>>>>> descriptor (Memory write), which led to the problem. >>>>> >>>>> Have all ath11k and ath12k firmware been updated to prevent this problem from >>>>> the firmware side? >>>>> >>>> No, as this is not a widespread issue, and addressing it would require >>>> modifying the core underlying modules of the firmware. Therefore, we >>>> chose not to proceed with that approach but instead used the workaround >>>> patch I previously submitted. >> >> If firmware has a concern, how about doing it in host? As I know it is only a register in >> PCI config space? >> > > No, host can only configure the RC, while the initialization of the EP can only be > configured on the firmware side. Are you talking about this specific register or whole configuration space? If it is the latter case we already have something similar (such as disabling ASPM) done in host side. Just curious why not for your issue. > >>> >>> I strongly suggest you fix this at the firmware level rather than try to >>> work around it in the kernel to avoid playing whack-a-mole whenever a >>> new (hard to track down) bug shows up. >>> >>> The barriers should be enough, but if they are not then the firmware >>> must be fixed. >>> >>> Johan >> > This is beyond our control. After nearly three months of effort, we have decided to > abandon it. >