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[114.137.68.118]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-36a238da675sm11838778eec.5.2026.10.28.19.26.52 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 28 Oct 2026 19:26:56 -0700 (PDT) Message-ID: <0752dec9-2de8-43fa-931b-27e1cae6e1df@gmail.com> Date: Thu, 29 Oct 2026 10:24:39 +0800 X-Mailing-List: linux-sound@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 2/2] ASoC: codecs: nau8310: Add support for NAU83G10 amplifier To: Mark Brown , Neo Chang Cc: lgirdwood@gmail.com, perex@perex.cz, robh@kernel.org, krzk+dt@kernel.org, linux-sound@vger.kernel.org, devicetree@vger.kernel.org, alsa-devel@alsa-project.org, kchsu0@nuvoton.com, sjlin0@nuvoton.com References: <20261022084037.259983-1-YLCHANG2@nuvoton.com> <20261022084037.259983-3-YLCHANG2@nuvoton.com> <179304693306.199157.5210648249546181520.b4-review@b4> Content-Language: en-US From: YLCHANG2 In-Reply-To: <179304693306.199157.5210648249546181520.b4-review@b4> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 10/27/26 04:35, Mark Brown wrote: >> Add support for the Nuvoton NAU83G10 audio amplifier. >> The NAU83G10 is a mono boost Class-D audio amplifier with >> integrated DSP and I/V-sense support. >> imply SND_SOC_MT6660 >> imply SND_SOC_NAU8315 >> imply SND_SOC_NAU8325 >> + imply SND_SOC_NAU8310 > Please keep these sorted, same in other places like Makefile. Got it. I will fix the sorting here and in the Makefile in v2. > >> +static void nau8310_send_data_payload(struct snd_soc_component *cp, >> + unsigned short dsp_addr, const void *param_data, int param_size, >> + int *frag_cnt, int *padding) >> +{ >> + const u8 *data = (const u8 *)param_data; >> + u32 payload = 0; >> + int i, data_size = 0; >> + >> + for (i = 0; i < param_size; i++) { >> + payload |= data[i] << (data_size * 8); > data[i] will be promoted to int which won't DTRT for values with the top > bit set, cast to u32 before shifting. Thanks for catching this. I will cast it to u32 before shifting in v2. > >> + struct snd_soc_component *cp = snd_soc_dapm_to_component(w->dapm); >> + struct nau8310 *nau8310 = snd_soc_component_get_drvdata(cp); >> + int ret = 0; >> + >> + if (SND_SOC_DAPM_EVENT_ON(event)) { >> + ret = nau8310_dsp_exec_command(cp, NAU8310_DSP_CMD_CLK_RESTART, > This needs to take nau8310->lock to avoid races with firmware load. Got it. I will add the lock to protect this in v2. > >> + dev_info(dev, "Algorithm of DSP is ready, status %x", status); > dev_dbg(), this will get run a lot. I will change this to dev_dbg() in v2. > >> + dev_dbg(dev, "Request firmware and wait until finish."); >> + ret = request_firmware(&fw, NAU8310_DSP_FIRMWARE, dev); > We have a firmware-name in the binding, shouldn't we use it? I will modify it to use nau8310->dsp_firmware in v2. > >> +err_loaded: >> + regmap_update_bits(regmap, NAU8310_R13_MUTE_CTRL, NAU8310_SOFT_MUTE, 0); > Shouldn't we leave things muted? It's redundant here. I will remove it in v2. > >> +static int nau8310_clkdet_put(struct snd_kcontrol *kcontrol, >> + struct snd_ctl_elem_value *ucontrol) >> +{ >> + struct soc_mixer_control *mc = >> + (struct soc_mixer_control *)kcontrol->private_value; >> + struct snd_soc_dapm_context *dapm = snd_soc_dapm_kcontrol_to_dapm(kcontrol); Got it. I will remove the dapm lookup function here in v2. > This isn't a DAPM control, we can't use this lookup. > >> +static int nau8310_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) >> +{ >> + struct snd_soc_component *component = dai->component; >> + struct nau8310 *nau8310 = snd_soc_component_get_drvdata(component); >> + struct regmap *regmap = nau8310->regmap; >> + unsigned int ctrl1_val = 0, ctrl2_val = 0; >> + >> + switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { > SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK. I will change it to SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK in v2. > >> +static int nau8310_switch_internal_osc(struct snd_soc_component *cp) >> +{ >> + struct nau8310 *nau8310 = snd_soc_component_get_drvdata(cp); >> + int ret; >> + >> + /* For internal Ring OSC, the default fs apply to 48kHz */ >> + nau8310->fs = NAU8310_DEFAULT_SAMPLE_RATE; > This will overwrite anything set_sysclk() set, since we call this from > _shutdown() and _resume() we're relying on the machine driver > reconfiguring the clocks when starting streams. Regarding `switch_internal_osc()` overwriting `set_sysclk()` states during suspend/resume, I'm considering two fixes: 1. Add NAU8310_CLK_INTERNAL to set_sysclk(): Standardizes and unifies clock setting through set_sysclk(). It sets the 48kHz internal clock here, but would still temporarily overwrite the nau8310->fs and mclk states during _shutdown() and _resume(). 2. Pass arguments to clock_config(..., mclk, fs): Configures the 48kHz hardware directly via arguments, leaving the nau8310->fs and mclk states completely untouched. Which approach would be preferred for upstream? >