All of lore.kernel.org
 help / color / mirror / Atom feed
From: Michael Schmitz <schmitzmic@gmail.com>
To: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: dlemoal@kernel.org, linux-ide@vger.kernel.org,
	linux-m68k@vger.kernel.org, will@sowerbutts.com,
	rz@linux-m68k.org, stable@vger.kernel.org,
	Finn Thain <fthain@linux-m68k.org>
Subject: Re: [PATCH v3 1/2] ata: pata_falcon: fix IO base selection for Q40
Date: Tue, 22 Aug 2023 11:57:20 +1200	[thread overview]
Message-ID: <07f8a1f9-e145-2b0a-61f0-ac5fe5a8fa58@gmail.com> (raw)
In-Reply-To: <CAMuHMdUdqRZcwHnWCb0SJ34JM3BqEyejsgWajwsbe_F+6xZMjg@mail.gmail.com>

Hi Geert,

On 21/08/23 19:50, Geert Uytterhoeven wrote:
> Hi Michael,
>
> On Sat, Aug 19, 2023 at 1:49 AM Michael Schmitz <schmitzmic@gmail.com> wrote:
>> With commit 44b1fbc0f5f3 ("m68k/q40: Replace q40ide driver
>> with pata_falcon and falconide"), the Q40 IDE driver was
>> replaced by pata_falcon.c.
>>
>> Both IO and memory resources were defined for the Q40 IDE
>> platform device, but definition of the IDE register addresses
>> was modeled after the Falcon case, both in use of the memory
>> resources and in including register scale and byte vs. word
>> offset in the address.
>>
>> This was correct for the Falcon case, which does not apply
>> any address translation to the register addresses. In the
>> Q40 case, all of device base address, byte access offset
>> and register scaling is included in the platform specific
>> ISA access translation (in asm/mm_io.h).
>>
>> As a consequence, such address translation gets applied
>> twice, and register addresses are mangled.
>>
>> Use the device base address from the platform IO resource,
>> and use standard register offsets from that base in order
>> to calculate register addresses (the IO address translation
>> will then apply the correct ISA window base and scaling).
>>
>> Encode PIO_OFFSET into IO port addresses for all registers
>> except the data transfer register. Encode the MMIO offset
>> there (pata_falcon_data_xfer() directly uses raw IO with
>> no address translation).
>>
>> Reported-by: William R Sowerbutts <will@sowerbutts.com>
>> Closes: https://lore.kernel.org/r/CAMuHMdUU62jjunJh9cqSqHT87B0H0A4udOOPs=WN7WZKpcagVA@mail.gmail.com
>> Link: https://lore.kernel.org/r/CAMuHMdUU62jjunJh9cqSqHT87B0H0A4udOOPs=WN7WZKpcagVA@mail.gmail.com
>> Fixes: 44b1fbc0f5f3 ("m68k/q40: Replace q40ide driver with pata_falcon and falconide")
>> Cc: stable@vger.kernel.org
>> Cc: Finn Thain <fthain@linux-m68k.org>
>> Cc: Geert Uytterhoeven <geert@linux-m68k.org>
>> Tested-by: William R Sowerbutts <will@sowerbutts.com>
>> Signed-off-by: Michael Schmitz <schmitzmic@gmail.com>
> Thanks for the update!
>
>> --- a/drivers/ata/pata_falcon.c
>> +++ b/drivers/ata/pata_falcon.c
>> @@ -165,26 +165,39 @@ static int __init pata_falcon_init_one(struct platform_device *pdev)
>>          ap->pio_mask = ATA_PIO4;
>>          ap->flags |= ATA_FLAG_SLAVE_POSS | ATA_FLAG_NO_IORDY;
>>
>> -       base = (void __iomem *)base_mem_res->start;
>>          /* N.B. this assumes data_addr will be used for word-sized I/O only */
>> -       ap->ioaddr.data_addr            = base + 0 + 0 * 4;
>> -       ap->ioaddr.error_addr           = base + 1 + 1 * 4;
>> -       ap->ioaddr.feature_addr         = base + 1 + 1 * 4;
>> -       ap->ioaddr.nsect_addr           = base + 1 + 2 * 4;
>> -       ap->ioaddr.lbal_addr            = base + 1 + 3 * 4;
>> -       ap->ioaddr.lbam_addr            = base + 1 + 4 * 4;
>> -       ap->ioaddr.lbah_addr            = base + 1 + 5 * 4;
>> -       ap->ioaddr.device_addr          = base + 1 + 6 * 4;
>> -       ap->ioaddr.status_addr          = base + 1 + 7 * 4;
>> -       ap->ioaddr.command_addr         = base + 1 + 7 * 4;
>> -
>> -       base = (void __iomem *)ctl_mem_res->start;
>> -       ap->ioaddr.altstatus_addr       = base + 1;
>> -       ap->ioaddr.ctl_addr             = base + 1;
>> -
>> -       ata_port_desc(ap, "cmd 0x%lx ctl 0x%lx",
>> -                     (unsigned long)base_mem_res->start,
>> -                     (unsigned long)ctl_mem_res->start);
>> +       ap->ioaddr.data_addr = (void __iomem *)base_mem_res->start;
>> +
>> +       if (base_res) {         /* only Q40 has IO resources */
>> +               io_offset = 0x10000;
>> +               reg_scale = 1;
>> +               base = (void __iomem *)base_res->start;
>> +               ctl_base = (void __iomem *)ctl_res->start;
>> +
>> +               ata_port_desc(ap, "cmd %pa ctl %pa",
>> +                             &base_res->start,
>> +                             &ctl_res->start);
> This can be  moved outside the else, using %px to format base and
> ctl_base.

Right - do we need some additional message spelling out what address Q40 
uses for data transfers? (Redundant for Falcon, of course ...)

Though that could be handled outside the else, too:

ata_port_desc(ap, "cmd %px ctl %px data %pa",
               base, ctl_base, &ap->ioaddr.data_addr);

Cheers,

     Michael

>> +       } else {
>> +               base = (void __iomem *)base_mem_res->start;
>> +               ctl_base = (void __iomem *)ctl_mem_res->start;
>> +
>> +               ata_port_desc(ap, "cmd %pa ctl %pa",
>> +                             &base_mem_res->start,
>> +                             &ctl_mem_res->start);
>> +       }
> Gr{oetje,eeting}s,
>
>                          Geert
>

  reply	other threads:[~2023-08-21 23:57 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-08-18 23:49 [PATCH v3 0/2] Q40 IDE fixes Michael Schmitz
2023-08-18 23:49 ` [PATCH v3 1/2] ata: pata_falcon: fix IO base selection for Q40 Michael Schmitz
2023-08-21  7:50   ` Geert Uytterhoeven
2023-08-21 23:57     ` Michael Schmitz [this message]
2023-08-22  7:05       ` Geert Uytterhoeven
2023-08-22  7:27         ` Michael Schmitz
2023-08-22  8:27     ` Michael Schmitz
2023-08-22  8:39       ` Geert Uytterhoeven
2023-08-18 23:49 ` [PATCH v3 2/2] ata: pata_falcon: add data_swab option to byte-swap disk data Michael Schmitz

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=07f8a1f9-e145-2b0a-61f0-ac5fe5a8fa58@gmail.com \
    --to=schmitzmic@gmail.com \
    --cc=dlemoal@kernel.org \
    --cc=fthain@linux-m68k.org \
    --cc=geert@linux-m68k.org \
    --cc=linux-ide@vger.kernel.org \
    --cc=linux-m68k@vger.kernel.org \
    --cc=rz@linux-m68k.org \
    --cc=stable@vger.kernel.org \
    --cc=will@sowerbutts.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.