Re: [PATCH v2 RESEND v2 0/5] Add Agilex5 support in SVC driver and FPGA configuration and partial reconfiguration support for Agilex5

[Dinh Nguyen <dinguyen@kernel.org>]

On 8/12/26 15:50, Adrian Ng Ho Yin wrote:
> This series adds support for Agilex5 in the SVC driver and enables FPGA
> configuration and partial reconfiguration on Altera Agilex5 SoC.
> 
> On Agilex5 the DDR base address starts at 0x8000_0000, which is
> outside the addressable range of the SDM. The SMMU is used to remap
> DDR-allocated buffers to an IOVA within the SDM-accessible 0-512MB
> window. Agilex5 REV B introduced a hardware SDM address remapper,
> but it must be bypassed so no additional offset is applied to the
> IOVA, keeping the implementation consistent across all Agilex5
> revisions.
> 
> Patch 1 adds the fpga-mgr child node and fpga-region to the Agilex5 DTSI,
> and removes the disabled status from the smmu node to enable it, which is
> always required on Agilex5 for the service layer to operate correctly.

I've applied the DTS patch.

> 
> Patch 2 adds the SMC call definition for the SDM address remapper
> configuration in stratix10-smc.h. This is a standalone header change with
> no driver dependency.

This patch just adds defines with no usage of them. Please add the usage.
> 
> Patch 3 fixes a pre-existing list corruption bug in
> stratix10_svc_free_memory() where an unmatched free called
> list_del(&svc_data_mem), corrupting the list head. It also cleans up
> related coding style in svc_pa_to_va(). This fix is split out first so it
> can be reviewed and backported independently.
> 
> Patch 4 adds all data-structure fields, macros, includes, helper function,
> and allocation/free paths required for the DMA coherent mode. This covers
> both the foundational types (dma_addr, use_dma_mem, dma_addr_offset,
> SVC_SDM_DMA_ADDR_BITS/OFFSET) and the functional DMA allocation/free code,
> keeping the structural and functional changes together so each intermediate
> commit is bisect-safe.
> 
> Patch 5 integrates all of the above into probe: enforces SMMU presence for
> intel,agilex5-svc, issues the remapper-bypass SMC, selects the DMA path,
> initialises the controller fields, registers a devm cleanup action for
> leaked buffers, and guards the error path against a NULL genpool.

These 3 patches no longer apply cleanly. Please rebase on top of 
socfpga_firmware_for_v7.4 and resend.

Thanks,
Dinh