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[109.243.69.121]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-bc55f513fb1sm90320666b.59.2026.05.06.07.53.08 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 06 May 2026 07:53:08 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:In-Reply-To:From:Content-Language:References:Cc:To:Subject:User-Agent:MIME-Version:Date:Message-ID" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1778079189; x=1778683989; darn=lists.xenproject.org; h=content-transfer-encoding:in-reply-to:from:content-language :references:cc:to:subject:user-agent:mime-version:date:message-id :from:to:cc:subject:date:message-id:reply-to; bh=O8eCso9JF5h9nnziTzZhX3HW4IUp9A3EoU1q779h1Qs=; b=WSRjnhNntorNHDZayMTc5qkzQmlzvValy5WIp+absPB94hDKp9DIvbENnfTSq4LBpC JcSS1GyukmrJ5R4ovOZuxsSyj+VfAQWc89M43JjAOImVXrN8wMbT0z63LcqwbAId6cc9 VTrlxl1RZMLxb+TqS7w0Lh1jsd8PAvxq5m7XIyh2IoLBVbD7dYGKcy0OagX2tT51ns6q 0ajs1rxwre6Mq/AANivT69kTdEajB5qq+JD9dZpY2hc+Nct+/S5oMVY83HIOHTmPLkrE +LjEuJE34Q/71Wc0z71KHtU06fsx+2yKZ1UpMPK2y10qjeJ+Kf++gEBEkTyA8kp0Dgj7 KkRQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778079189; x=1778683989; h=content-transfer-encoding:in-reply-to:from:content-language :references:cc:to:subject:user-agent:mime-version:date:message-id :x-gm-gg:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=O8eCso9JF5h9nnziTzZhX3HW4IUp9A3EoU1q779h1Qs=; b=U+eKCkvGhestu+pYFeHJm5IHcbeeYNzYLgtgFRl9gxyg19UaYtqEPYxVxiFa6MN58B sjsdQLXo+qz5Zbn6bcyR4jLDcyOyhjbgJ2MyPoLTfJfCn8ldnkiWtnnJoLY9ltTrtFLd v4YTdsuGpDfXcPKvs3mOTCvDlO8KUTiP7Hsjic/qLALfqG7OGe4/3bAosuJXASni43J/ WRhIcwyjbr40Ptfl7eArF6RQB9fP71qujPtt31iomkV3Ftr7+2pq0eRgeLpG9/WEpykh q+oK23WYMtm+rVazUqPrvMYo7i6nHXdsq4gfQ0VIaq87Soch+tpCWKk3TpmsZPisdTa1 +8aQ== X-Forwarded-Encrypted: i=1; AFNElJ8dRKhFse83vTMZ54k7QFUsVzwpFT9c2gKCdWZ6upD9FjjoPGm8u37l0KimDj09QFrOE80/YsdUv50=@lists.xenproject.org X-Gm-Message-State: AOJu0Yxwtk55M9FuaQqMoUYRvmjGx/i96Wv3hTnOG4IIgN9QMj+QPUQQ VETqjzQ2Mjmyn65v88WkzE3vDNQrd1CoxsUMS06L1ZHAEDKN0HynS0Ab X-Gm-Gg: AeBDievDPuo8Rt1K7hvy+m7LZJAXgUTRW0TetDFcq8KaUoMQrcb5H5KED+qrIT+GJC1 9CzJkzoJnLyClkgll/OdkKUyxX/gwqZeSuyTZaqgYA+m+XJkQSybpXOy1hfPr4V+l0RyFede1sP hdrUSWQy/7PTW2Plm3nzL/u0hGRmzBZERv2iFM+yuuBZoYpdWAOi1HzMWZ5V8LWu4wPeFKmRI1/ vLS/hOB25R18lZf+TgN76tY7p9Wsl7hAapTgNhEyVUYNxhSiE+JbsxKRYt7hA2Ma/p+GhEHV6S7 PIYKHGwr+6JWZ0W/de7ZHcDpwwOf3Z+dYnWCsO5RqXM5psJ1bbDN1wTfAkyaZhgy0lXB6/IBUAW yqMl1JCUKML9el5TJqw0CTgOCHvlBKRKt8sw8W4V288fjqyZnysn5AgcfO9+Gui+fTUGWl6scpA mQ7/L5J+Q3ikhuuRxC4ZhtpkH9oAjQhypgnghXzHg62tG0w96GxnFOwDnmwmytivlnOVGsn9Ah9 RNqMvhvcNvWdQ== X-Received: by 2002:a17:907:709:b0:bb7:beb9:b6d5 with SMTP id a640c23a62f3a-bc56da16349mr234983766b.39.1778079189084; Wed, 06 May 2026 07:53:09 -0700 (PDT) Message-ID: <082f5c79-0cf9-4eef-b80c-e5e9b594576d@gmail.com> Date: Wed, 6 May 2026 16:53:07 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 07/11] xen/riscv: add Linux kernel loading support To: Jan Beulich Cc: Romain Caritey , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: Content-Language: en-US From: Oleksii Kurochko In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-ef75cf/1778079189-23175C48-A1A24B29/10/73395122804 X-purgate-type: spam X-purgate-size: 1190 On 5/4/26 4:05 PM, Jan Beulich wrote: >> --- a/xen/include/xen/fdt-kernel.h >> +++ b/xen/include/xen/fdt-kernel.h >> @@ -59,8 +59,15 @@ struct kernel_info { >> struct { >> paddr_t kernel_addr; >> paddr_t len; >> -#if defined(CONFIG_ARM_64) || defined(CONFIG_RISCV_64) >> - paddr_t text_offset; /* 64-bit Image only */ >> +#if defined(CONFIG_ARM_64) || defined(CONFIG_RISCV) >> + /* >> + * ARM: 64-bit Image only. >> + * RISC-V: both 32-bit and 64-bit Images. >> + */ >> + paddr_t text_offset; >> +#endif >> +#if defined(CONFIG_RISCV) >> + uint64_t image_size; /* Effective size of Image */ > As this (apparently) is for both RV64 and RV32 - can the latter really have > wider than 32-bit image sizes? If not - use size_t or unsigned long here? It seems like we want to have uint64_t as it is explicitly mentioned in image header: https://elixir.bootlin.com/linux/v7.0.1/source/arch/riscv/include/asm/image.h#L57 and also it is used .dword here: https://elixir.bootlin.com/linux/v7.0.1/source/arch/riscv/kernel/head.S#L55 ~ Oleksii