From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
To: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>,
"Joerg Roedel (AMD)" <joro@8bytes.org>,
Will Deacon <will@kernel.org>,
Robin Murphy <robin.murphy@arm.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Rob Clark <robin.clark@oss.qualcomm.com>,
Bjorn Andersson <andersson@kernel.org>,
Luca Weiss <luca.weiss@fairphone.com>
Cc: linux-arm-msm@vger.kernel.org, iommu@lists.linux.dev,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 06/12] iommu: qcom_iommu: support non-TZ-managed instances
Date: Mon, 17 Aug 2026 13:40:43 +0200 [thread overview]
Message-ID: <08bc7c0c-4e15-4e76-8ed0-34dbee36a6ce@oss.qualcomm.com> (raw)
In-Reply-To: <20260809-msm8974-iommu-upstream-v1-6-87f5cd492560@oss.qualcomm.com>
On 8/9/26 10:15 PM, Dmitry Baryshkov wrote:
> The GPU on MSM8974 has never been usable upstream because its IOMMU
> cannot be driven: unlike the MSM8916-style instances this driver
> supports, where the secure world owns the SMMU global register space
> and the OS programs just the context banks after a restore_sec_cfg SCM
> call, the MSM8974 GPU IOMMU is not managed by TZ at all. Nobody sets
> up its stream mapping, so attaching a domain leaves every transaction
> unmatched and the GPU faults on its first memory access. Verified on
> the APQ8074 dragonboard: restore_sec_cfg is only accepted for the
> secured instances, while the GPU instance exposes its ID registers to
> the OS (IDR0 0x78034404 / IDR1 0x10000003).
>
> Add a non-secure programming mode, derived from the downstream
> msm_iommu-v1.c driver. When qcom,iommu-secure-id is absent, reset and
> program the global space at runtime resume instead of calling into TZ:
> clear sACR/sCR2 and the global fault state, invalidate the TLB and all
> SMRs, install the per-instance stream mapping (SMR/S2CR/CBAR, with the
> downstream MEMATTR/NSCFG/VMID/IRPTNDX values) and enable the SMMU with
> fault reporting enabled and stalling disabled (sCR0.STALLD, matching
> the downstream terminate model). The stream ID map is per-instance
> configuration data since it is not discoverable from the hardware; the
> SMR index allocation keeps ASID == context bank index, which this
> hardware requires (downstream msm-3.10 commit 4d92ea10aac3 ("iommu:
> msm: Use CB index as ASID")). Also set CB_ACTLR to redirect cacheable
> requests to the L2 slave port, as the downstream driver does for every
> context on this IP generation - on MSM8916 TZ owns CB_ACTLR, so the
> driver never needed to touch it before.
At this point, would it make more sense to retrofit this atop
arm-smmu-qcom.c given all of the differences vs 8916?
Konrad
next prev parent reply other threads:[~2026-08-17 11:40 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-09 20:15 [PATCH 00/12] iommu: qcom_iommu: implement support for instances on MSM8974 Dmitry Baryshkov
2026-08-09 20:15 ` [PATCH 01/12] dt-bindings: iommu: qcom,iommu: document the MSM8974 IOMMUs Dmitry Baryshkov
2026-08-09 20:28 ` sashiko-bot
2026-08-09 20:15 ` [PATCH 02/12] iommu: arm-smmu: add global register definitions used by the QSMMU Dmitry Baryshkov
2026-08-09 20:15 ` [PATCH 03/12] iommu: qcom_iommu: extract context bank programming into a helper Dmitry Baryshkov
2026-08-09 20:27 ` sashiko-bot
2026-08-09 20:15 ` [PATCH 04/12] iommu: qcom_iommu: support the short-descriptor pagetable format Dmitry Baryshkov
2026-08-09 20:30 ` sashiko-bot
2026-08-09 20:15 ` [PATCH 05/12] iommu: qcom_iommu: handle the SMMU global register space Dmitry Baryshkov
2026-08-09 20:29 ` sashiko-bot
2026-08-09 20:15 ` [PATCH 06/12] iommu: qcom_iommu: support non-TZ-managed instances Dmitry Baryshkov
2026-08-09 20:39 ` sashiko-bot
2026-08-17 11:40 ` Konrad Dybcio [this message]
2026-08-09 20:15 ` [PATCH 07/12] iommu: qcom_iommu: restore context bank state after power collapse Dmitry Baryshkov
2026-08-09 20:28 ` sashiko-bot
2026-08-09 20:15 ` [PATCH 08/12] iommu: qcom_iommu: halt the micro-MMU while programming context banks Dmitry Baryshkov
2026-08-09 20:33 ` sashiko-bot
2026-08-09 20:15 ` [PATCH 09/12] iommu: qcom_iommu: allow faulting transactions to terminate Dmitry Baryshkov
2026-08-09 20:28 ` sashiko-bot
2026-08-09 20:15 ` [PATCH 10/12] iommu: qcom_iommu: program BFP (prefetch) settings Dmitry Baryshkov
2026-08-09 20:28 ` sashiko-bot
2026-08-09 20:15 ` [PATCH 11/12] iommu: qcom_iommu: add the MSM8974 instances Dmitry Baryshkov
2026-08-09 20:28 ` sashiko-bot
2026-08-09 20:15 ` [PATCH 12/12] ARM: dts: qcom: msm8974: add the IOMMUs Dmitry Baryshkov
2026-08-10 10:16 ` [PATCH 00/12] iommu: qcom_iommu: implement support for instances on MSM8974 Luca Weiss
2026-08-11 12:43 ` Dmitry Baryshkov
2026-08-24 10:04 ` Luca Weiss
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=08bc7c0c-4e15-4e76-8ed0-34dbee36a6ce@oss.qualcomm.com \
--to=konrad.dybcio@oss.qualcomm.com \
--cc=andersson@kernel.org \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=dmitry.baryshkov@oss.qualcomm.com \
--cc=iommu@lists.linux.dev \
--cc=joro@8bytes.org \
--cc=konradybcio@kernel.org \
--cc=krzk+dt@kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=luca.weiss@fairphone.com \
--cc=robh@kernel.org \
--cc=robin.clark@oss.qualcomm.com \
--cc=robin.murphy@arm.com \
--cc=will@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.