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From: Harsh Prateek Bora <harshpb@linux.ibm.com>
To: "Philippe Mathieu-Daudé" <philmd@linaro.org>, qemu-devel@nongnu.org
Cc: Anton Johansson <anjo@rev.ng>,
	Paolo Bonzini <pbonzini@redhat.com>,
	BALATON Zoltan <balaton@eik.bme.hu>,
	Nicholas Piggin <npiggin@gmail.com>,
	Glenn Miles <milesg@linux.ibm.com>,
	kvm@vger.kernel.org, qemu-ppc@nongnu.org,
	Pierrick Bouvier <pierrick.bouvier@linaro.org>,
	Chinmay Rath <rathc@linux.ibm.com>
Subject: Re: [PATCH 2/8] target/ppc: Factor common ppc_load_epr() helper out
Date: Mon, 20 Apr 2026 12:16:32 +0530	[thread overview]
Message-ID: <09352eea-3794-42c2-becc-b5c7dbd37732@linux.ibm.com> (raw)
In-Reply-To: <20260319111936.68041-3-philmd@linaro.org>



On 19/03/26 4:49 pm, Philippe Mathieu-Daudé wrote:
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
>   target/ppc/cpu.h         | 2 ++
>   target/ppc/cpu.c         | 8 ++++++++
>   target/ppc/excp_helper.c | 3 +--
>   target/ppc/kvm.c         | 2 +-
>   4 files changed, 12 insertions(+), 3 deletions(-)
> 
> diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
> index d637a50798f..e3e4bce91b7 100644
> --- a/target/ppc/cpu.h
> +++ b/target/ppc/cpu.h
> @@ -2822,6 +2822,8 @@ enum {
>   target_ulong cpu_read_xer(const CPUPPCState *env);
>   void cpu_write_xer(CPUPPCState *env, target_ulong xer);
>   
> +uint64_t ppc_load_epr(CPUPPCState *env);
> +

This declaration is added unconditionally, although its implementation 
in target/ppc/cpu.c is placed inside #if !defined(CONFIG_USER_ONLY).
Should we guard the declaration also?

Otherwise, LTGM.

Reviewed-by: Harsh Prateek Bora <harshpb@linux.ibm.com>

>   /*
>    * All 64-bit server processors compliant with arch 2.x, ie. 970 and newer,
>    * have PPC_SEGMENT_64B.
> diff --git a/target/ppc/cpu.c b/target/ppc/cpu.c
> index 4d8faaddee2..f24801a9731 100644
> --- a/target/ppc/cpu.c
> +++ b/target/ppc/cpu.c
> @@ -26,6 +26,7 @@
>   #include "fpu/softfloat-helpers.h"
>   #include "mmu-hash64.h"
>   #include "helper_regs.h"
> +#include "system/memory.h"
>   #include "system/tcg.h"
>   
>   target_ulong cpu_read_xer(const CPUPPCState *env)
> @@ -105,6 +106,13 @@ void ppc_store_lpcr(PowerPCCPU *cpu, target_ulong val)
>       ppc_maybe_interrupt(env);
>   }
>   
> +uint64_t ppc_load_epr(CPUPPCState *env)
> +{
> +    CPUState *cs = env_cpu(env);
> +
> +    return ldl_phys(cs->as, env->mpic_iack);
> +}
> +
>   #if defined(TARGET_PPC64)
>   void ppc_update_ciabr(CPUPPCState *env)
>   {
> diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
> index 6d05b865058..3b476c145ab 100644
> --- a/target/ppc/excp_helper.c
> +++ b/target/ppc/excp_helper.c
> @@ -1166,9 +1166,8 @@ static void powerpc_excp_booke(PowerPCCPU *cpu, int excp)
>           break;
>       case POWERPC_EXCP_EXTERNAL:  /* External input                           */
>           if (env->mpic_proxy) {
> -            CPUState *cs = env_cpu(env);
>               /* IACK the IRQ on delivery */
> -            env->spr[SPR_BOOKE_EPR] = ldl_phys(cs->as, env->mpic_iack);
> +            env->spr[SPR_BOOKE_EPR] = ppc_load_epr(env);
>           }
>           break;
>       case POWERPC_EXCP_ALIGN:     /* Alignment exception                      */
> diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c
> index 41bd03ec2a2..3bff75b7f54 100644
> --- a/target/ppc/kvm.c
> +++ b/target/ppc/kvm.c
> @@ -1692,7 +1692,7 @@ int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run)
>   #endif
>       case KVM_EXIT_EPR:
>           trace_kvm_handle_epr();
> -        run->epr.epr = ldl_phys(cs->as, env->mpic_iack);
> +        run->epr.epr = ppc_load_epr(env);
>           ret = 0;
>           break;
>       case KVM_EXIT_WATCHDOG:


  reply	other threads:[~2026-04-20  6:46 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-03-19 11:19 [PATCH 0/8] target/ppc: Forbid to use legacy ldst_phys() API Philippe Mathieu-Daudé
2026-03-19 11:19 ` [PATCH 1/8] hw/ppc/spapr: Un-inline rtas_load/store() helpers Philippe Mathieu-Daudé
2026-04-20  6:45   ` Harsh Prateek Bora
2026-03-19 11:19 ` [PATCH 2/8] target/ppc: Factor common ppc_load_epr() helper out Philippe Mathieu-Daudé
2026-04-20  6:46   ` Harsh Prateek Bora [this message]
2026-03-19 11:19 ` [PATCH 3/8] target/ppc/mmu: Remove unused hash32_store_hpte() helpers Philippe Mathieu-Daudé
2026-04-20  6:51   ` Harsh Prateek Bora
2026-03-19 11:19 ` [PATCH 4/8] target/ppc/mmu: Restrict hash32_load_hpte() helpers scope Philippe Mathieu-Daudé
2026-04-20  6:55   ` Harsh Prateek Bora
2026-03-19 11:19 ` [PATCH 5/8] target/ppc/mmu: Replace legacy ld/st_phys() -> address_space_ld/st() Philippe Mathieu-Daudé
2026-03-19 12:59   ` BALATON Zoltan
2026-04-19 16:10     ` Philippe Mathieu-Daudé
2026-04-22  7:12       ` Harsh Prateek Bora
2026-04-22 12:43         ` Miles Glenn
2026-03-19 11:19 ` [PATCH 6/8] hw/ppc/pegasos: Introduce rtas_ldl() / rtas_stl() helpers Philippe Mathieu-Daudé
2026-03-19 11:19 ` [PATCH 7/8] hw/ppc/pegasos: Replace legacy ld/st_phys() -> address_space_ld/st() Philippe Mathieu-Daudé
2026-03-19 11:19 ` [PATCH 8/8] configs/targets: Restrict the legacy ldst_phys() API on PPC Philippe Mathieu-Daudé
2026-04-19 16:11 ` [PATCH 0/8] target/ppc: Forbid to use legacy ldst_phys() API Philippe Mathieu-Daudé
2026-04-22  5:34 ` Chinmay Rath
2026-04-22 12:44 ` Miles Glenn

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