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Wed, 14 Oct 2026 20:05:32 GMT Received: from smtprelay06.wdc07v.mail.ibm.com ([172.16.1.73]) by ppma23.wdc07v.mail.ibm.com (PPS) with ESMTPS id 4h816h8yr0-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 14 Oct 2026 20:05:32 +0000 (GMT) Received: from smtpav04.dal12v.mail.ibm.com (smtpav04.dal12v.mail.ibm.com [10.241.53.103]) by smtprelay06.wdc07v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 69EK5VBq58982818 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 14 Oct 2026 20:05:31 GMT Received: from smtpav04.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 7B0A058063; Wed, 14 Oct 2026 20:05:31 +0000 (GMT) Received: from smtpav04.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 9E80758064; Wed, 14 Oct 2026 20:05:30 +0000 (GMT) Received: from mambor8.rchland.ibm.com (unknown [9.10.239.198]) by smtpav04.dal12v.mail.ibm.com (Postfix) with ESMTP; Wed, 14 Oct 2026 20:05:30 +0000 (GMT) Message-ID: <094500a3de467d2a3965d6b266a5d18152c737d2.camel@linux.ibm.com> Subject: Re: [PATCH v2 35/50] tests/qtest: ina230: cover the ALERT limit functions and CVRF From: Miles Glenn To: Emmanuel Blot , qemu-devel@nongnu.org Cc: =?ISO-8859-1?Q?C=E9dric?= Le Goater , Peter Maydell , Steven Lee , Troy Lee , Jamin Lin , Kane Chen , Andrew Jeffery , Joel Stanley , Pierrick Bouvier , qemu-arm@nongnu.org, Patrick Leis , Fabiano Rosas , Laurent Vivier , Paolo Bonzini , qemu-ppc@nongnu.org, qemu-riscv@nongnu.org, Philippe =?ISO-8859-1?Q?Mathieu-Daud=E9?= Date: Wed, 14 Oct 2026 15:05:30 -0500 In-Reply-To: <20261012-bmc-minerva-v2-35-4c3dff084ec9@free.fr> References: <20261012-bmc-minerva-v2-0-4c3dff084ec9@free.fr> <20261012-bmc-minerva-v2-35-4c3dff084ec9@free.fr> Organization: IBM Content-Type: text/plain; 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envelope-from=milesg@linux.ibm.com; helo=mx0b-001b2d01.pphosted.com X-Spam_score_int: -26 X-Spam_score: -2.7 X-Spam_bar: -- X-Spam_report: (-2.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: milesg@linux.ibm.com Errors-To: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org Sender: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org Reviewed-by: Glenn Miles Thanks, Glenn On Mon, 2026-10-12 at 16:32 +0200, Emmanuel Blot via qemu development wrote: > Cover the shunt/bus/power alert-limit functions, the alert latch > behaviour and the conversion-ready flag. > > Signed-off-by: Emmanuel Blot > --- > tests/qtest/ina230-test.c | 97 +++++++++++++++++++++++++++++++++++++++++++++++ > 1 file changed, 97 insertions(+) > > diff --git a/tests/qtest/ina230-test.c b/tests/qtest/ina230-test.c > index b01f9445d1..1c55028fcb 100644 > --- a/tests/qtest/ina230-test.c > +++ b/tests/qtest/ina230-test.c > @@ -215,6 +215,98 @@ static void test_edges_overflow(void *obj, void *data, QGuestAllocator *alloc) > g_assert_cmphex(i2c_get16(dev, REG_MASK_ENABLE) & ME_OVF, ==, ME_OVF); > } > > +/* Shunt over-limit alert (transparent mode) sets the AFF flag */ > +static void test_alert_shunt_over(void *obj, void *data, > + QGuestAllocator *alloc) > +{ > + QI2CDevice *dev = (QI2CDevice *)obj; > + > + i2c_set16(dev, REG_CONFIG, CONFIG_RST); > + > + i2c_set16(dev, REG_ALERT_LIMIT, 0x1000); > + i2c_set16(dev, REG_MASK_ENABLE, ME_SOL); > + > + qmp_ina230_set("shunt-voltage", 2500000); > + g_assert_cmphex(i2c_get16(dev, REG_MASK_ENABLE) & ME_AFF, ==, 0); > + > + qmp_ina230_set("shunt-voltage", 20000000); > + g_assert_cmphex(i2c_get16(dev, REG_MASK_ENABLE) & ME_AFF, ==, ME_AFF); > + > + qmp_ina230_set("shunt-voltage", 2500000); > + g_assert_cmphex(i2c_get16(dev, REG_MASK_ENABLE) & ME_AFF, ==, 0); > +} > + > +/* Latch mode holds the alert until the Mask/Enable register is read */ > +static void test_alert_latch(void *obj, void *data, QGuestAllocator *alloc) > +{ > + QI2CDevice *dev = (QI2CDevice *)obj; > + uint16_t me; > + > + i2c_set16(dev, REG_CONFIG, CONFIG_RST); > + > + i2c_set16(dev, REG_ALERT_LIMIT, 0x1000); > + i2c_set16(dev, REG_MASK_ENABLE, ME_SOL | ME_LEN); > + > + qmp_ina230_set("shunt-voltage", 20000000); > + qmp_ina230_set("shunt-voltage", 2500000); > + > + me = i2c_get16(dev, REG_MASK_ENABLE); > + g_assert_cmphex(me & ME_AFF, ==, ME_AFF); > + > + g_assert_cmphex(i2c_get16(dev, REG_MASK_ENABLE) & ME_AFF, ==, 0); > +} > + > +/* Bus over-limit alert */ > +static void test_alert_bus(void *obj, void *data, QGuestAllocator *alloc) > +{ > + QI2CDevice *dev = (QI2CDevice *)obj; > + > + i2c_set16(dev, REG_CONFIG, CONFIG_RST); > + > + i2c_set16(dev, REG_ALERT_LIMIT, 0x2000); > + i2c_set16(dev, REG_MASK_ENABLE, ME_BOL); > + > + qmp_ina230_set("bus-voltage", 5000000); > + g_assert_cmphex(i2c_get16(dev, REG_MASK_ENABLE) & ME_AFF, ==, 0); > + > + qmp_ina230_set("bus-voltage", 12000000); > + g_assert_cmphex(i2c_get16(dev, REG_MASK_ENABLE) & ME_AFF, ==, ME_AFF); > +} > + > +/* Power over-limit alert */ > +static void test_alert_power(void *obj, void *data, QGuestAllocator *alloc) > +{ > + QI2CDevice *dev = (QI2CDevice *)obj; > + > + i2c_set16(dev, REG_CONFIG, CONFIG_RST); > + > + qmp_ina230_set("shunt-voltage", 20000000); > + qmp_ina230_set("bus-voltage", 11980000); > + i2c_set16(dev, REG_CALIBRATION, 0x0A00); > + > + i2c_set16(dev, REG_ALERT_LIMIT, 0x1000); > + i2c_set16(dev, REG_MASK_ENABLE, ME_POL); > + g_assert_cmphex(i2c_get16(dev, REG_MASK_ENABLE) & ME_AFF, ==, ME_AFF); > + > + i2c_set16(dev, REG_ALERT_LIMIT, 0x2000); > + g_assert_cmphex(i2c_get16(dev, REG_MASK_ENABLE) & ME_AFF, ==, 0); > +} > + > +/* Conversion Ready Flag: set on conversion, cleared by reading Mask/Enable */ > +static void test_cvrf(void *obj, void *data, QGuestAllocator *alloc) > +{ > + QI2CDevice *dev = (QI2CDevice *)obj; > + > + i2c_set16(dev, REG_CONFIG, CONFIG_RST); > + > + /* A conversion (triggered by injection) sets CVRF */ > + qmp_ina230_set("shunt-voltage", 20000000); > + g_assert_cmphex(i2c_get16(dev, REG_MASK_ENABLE) & ME_CVRF, ==, ME_CVRF); > + > + /* The previous read cleared CVRF; no conversion since, so it stays clear */ > + g_assert_cmphex(i2c_get16(dev, REG_MASK_ENABLE) & ME_CVRF, ==, 0); > +} > + > static void ina230_register_nodes(void) > { > QOSGraphEdgeOptions opts = { > @@ -235,5 +327,10 @@ static void ina230_register_nodes(void) > qos_add_test("power", "ina230", test_power, NULL); > qos_add_test("zero-cal", "ina230", test_zero_cal, NULL); > qos_add_test("edges-overflow", "ina230", test_edges_overflow, NULL); > + qos_add_test("alert-shunt-over", "ina230", test_alert_shunt_over, NULL); > + qos_add_test("alert-latch", "ina230", test_alert_latch, NULL); > + qos_add_test("alert-bus", "ina230", test_alert_bus, NULL); > + qos_add_test("alert-power", "ina230", test_alert_power, NULL); > + qos_add_test("cvrf", "ina230", test_cvrf, NULL); > } > libqos_init(ina230_register_nodes); >