From: Neeraj Soni <neeraj.soni@oss.qualcomm.com>
To: Krzysztof Kozlowski <krzk@kernel.org>
Cc: ulf.hansson@linaro.org, robh@kernel.org, krzk+dt@kernel.org,
conor+dt@kernel.org, andersson@kernel.org,
konradybcio@kernel.org, linux-mmc@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v5 3/3] arm64: dts: qcom: monaco: enable the inline crypto engine for SDHC
Date: Tue, 10 Mar 2026 09:53:29 +0530 [thread overview]
Message-ID: <09d09441-3495-bb12-8d9f-31effeb714be@oss.qualcomm.com> (raw)
In-Reply-To: <20260307-wonderful-vehement-macaw-33b6fd@quoll>
On 3/7/2026 4:07 PM, Krzysztof Kozlowski wrote:
> On Fri, Mar 06, 2026 at 03:03:32PM +0530, Neeraj Soni wrote:
>> Add an ICE node to monaco SoC description and enable it by adding a
>> phandle to the SDHC node.
>
> No SoB, broken/missing DCO.
>
> checkpatch also would tell you that.
>
Sure. I will fix this in next patch.
> Best regards,
> Krzysztof
>
Regards
Neeraj
prev parent reply other threads:[~2026-03-10 4:23 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-06 9:33 [PATCH v5 0/3] Enable Inline crypto engine for kodiak and monaco Neeraj Soni
2026-03-06 9:33 ` [PATCH v5 1/3] dt-bindings: mmc: sdhci-msm: Add ICE phandle Neeraj Soni
2026-03-07 10:36 ` Krzysztof Kozlowski
2026-03-10 4:15 ` Neeraj Soni
2026-03-06 9:33 ` [PATCH v5 2/3] arm64: dts: qcom: kodiak: enable the inline crypto engine for SDHC Neeraj Soni
2026-03-06 9:33 ` [PATCH v5 3/3] arm64: dts: qcom: monaco: " Neeraj Soni
2026-03-07 10:37 ` Krzysztof Kozlowski
2026-03-10 4:23 ` Neeraj Soni [this message]
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