From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2EC99C61D85 for ; Tue, 21 Nov 2023 18:19:30 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1r5VL3-0001p8-22; Tue, 21 Nov 2023 13:19:09 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1r5VL0-0001la-V4; Tue, 21 Nov 2023 13:19:07 -0500 Received: from mail.ozlabs.org ([2404:9400:2221:ea00::3] helo=gandalf.ozlabs.org) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1r5VKz-0001Cz-16; Tue, 21 Nov 2023 13:19:06 -0500 Received: from gandalf.ozlabs.org (mail.ozlabs.org [IPv6:2404:9400:2221:ea00::3]) by gandalf.ozlabs.org (Postfix) with ESMTP id 4SZXh6502Cz4x1R; Wed, 22 Nov 2023 05:19:02 +1100 (AEDT) Received: from authenticated.ozlabs.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mail.ozlabs.org (Postfix) with ESMTPSA id 4SZXh50D5Hz4wx5; Wed, 22 Nov 2023 05:19:00 +1100 (AEDT) Message-ID: <0a502a57-e27e-46d2-a06e-0ec019470997@kaod.org> Date: Tue, 21 Nov 2023 19:19:00 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 07/11] ppc/pnv: Fix PNV I2C invalid status after reset Content-Language: en-US To: Glenn Miles , qemu-devel@nongnu.org, qemu-ppc@nongnu.org Cc: Nicholas Piggin , =?UTF-8?B?RnLDqWTDqXJpYyBCYXJyYXQ=?= References: <20231120235112.1951342-1-milesg@linux.vnet.ibm.com> <20231120235112.1951342-8-milesg@linux.vnet.ibm.com> From: =?UTF-8?Q?C=C3=A9dric_Le_Goater?= In-Reply-To: <20231120235112.1951342-8-milesg@linux.vnet.ibm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2404:9400:2221:ea00::3; envelope-from=SRS0=nm9w=HC=kaod.org=clg@ozlabs.org; helo=gandalf.ozlabs.org X-Spam_score_int: -39 X-Spam_score: -4.0 X-Spam_bar: ---- X-Spam_report: (-4.0 / 5.0 requ) BAYES_00=-1.9, HEADER_FROM_DIFFERENT_DOMAINS=0.25, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 11/21/23 00:51, Glenn Miles wrote: > The PNV I2C Controller was clearing the status register > after a reset without repopulating the "upper threshold > for I2C ports", "Command Complete" and the SCL/SDA input > level fields. > > Fixed this for resets caused by a system reset as well > as from writing to the "Immediate Reset" register. > > Reviewed-by: Cédric Le Goater > Fixes: 263b81ee15af ("ppc/pnv: Add an I2C controller model") > Signed-off-by: Glenn Miles > --- > > No changes from previous version This patch was merged upstream now. C. > > hw/ppc/pnv_i2c.c | 42 ++++++++++++++++++------------------------ > 1 file changed, 18 insertions(+), 24 deletions(-) > > diff --git a/hw/ppc/pnv_i2c.c b/hw/ppc/pnv_i2c.c > index b2c738da50..f80589157b 100644 > --- a/hw/ppc/pnv_i2c.c > +++ b/hw/ppc/pnv_i2c.c > @@ -462,6 +462,23 @@ static uint64_t pnv_i2c_xscom_read(void *opaque, hwaddr addr, > return val; > } > > +static void pnv_i2c_reset(void *dev) > +{ > + PnvI2C *i2c = PNV_I2C(dev); > + > + memset(i2c->regs, 0, sizeof(i2c->regs)); > + > + i2c->regs[I2C_STAT_REG] = > + SETFIELD(I2C_STAT_UPPER_THRS, 0ull, i2c->num_busses - 1) | > + I2C_STAT_CMD_COMP | I2C_STAT_SCL_INPUT_LEVEL | > + I2C_STAT_SDA_INPUT_LEVEL; > + i2c->regs[I2C_EXTD_STAT_REG] = > + SETFIELD(I2C_EXTD_STAT_FIFO_SIZE, 0ull, PNV_I2C_FIFO_SIZE) | > + SETFIELD(I2C_EXTD_STAT_I2C_VERSION, 0ull, 23); /* last version */ > + > + fifo8_reset(&i2c->fifo); > +} > + > static void pnv_i2c_xscom_write(void *opaque, hwaddr addr, > uint64_t val, unsigned size) > { > @@ -499,16 +516,7 @@ static void pnv_i2c_xscom_write(void *opaque, hwaddr addr, > break; > > case I2C_RESET_I2C_REG: > - i2c->regs[I2C_MODE_REG] = 0; > - i2c->regs[I2C_CMD_REG] = 0; > - i2c->regs[I2C_WATERMARK_REG] = 0; > - i2c->regs[I2C_INTR_MASK_REG] = 0; > - i2c->regs[I2C_INTR_COND_REG] = 0; > - i2c->regs[I2C_INTR_RAW_COND_REG] = 0; > - i2c->regs[I2C_STAT_REG] = 0; > - i2c->regs[I2C_RESIDUAL_LEN_REG] = 0; > - i2c->regs[I2C_EXTD_STAT_REG] &= > - (I2C_EXTD_STAT_FIFO_SIZE | I2C_EXTD_STAT_I2C_VERSION); > + pnv_i2c_reset(i2c); > break; > > case I2C_RESET_ERRORS: > @@ -620,20 +628,6 @@ static int pnv_i2c_dt_xscom(PnvXScomInterface *dev, void *fdt, > return 0; > } > > -static void pnv_i2c_reset(void *dev) > -{ > - PnvI2C *i2c = PNV_I2C(dev); > - > - memset(i2c->regs, 0, sizeof(i2c->regs)); > - > - i2c->regs[I2C_STAT_REG] = I2C_STAT_CMD_COMP; > - i2c->regs[I2C_EXTD_STAT_REG] = > - SETFIELD(I2C_EXTD_STAT_FIFO_SIZE, 0ull, PNV_I2C_FIFO_SIZE) | > - SETFIELD(I2C_EXTD_STAT_I2C_VERSION, 0ull, 23); /* last version */ > - > - fifo8_reset(&i2c->fifo); > -} > - > static void pnv_i2c_realize(DeviceState *dev, Error **errp) > { > PnvI2C *i2c = PNV_I2C(dev);