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([2a02:908:1252:fb60:be8a:bd56:1f94:86e7]) by smtp.gmail.com with ESMTPSA id e7sm2800046ilr.13.2021.01.28.06.49.05 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 28 Jan 2021 06:49:07 -0800 (PST) Subject: Re: [RFC PATCH 2/2] drm/amdgpu: enable gfx wave limiting for high priority compute jobs To: Nirmoy Das , amd-gfx@lists.freedesktop.org References: <20210128143554.61100-1-nirmoy.das@amd.com> <20210128143554.61100-2-nirmoy.das@amd.com> From: =?UTF-8?Q?Christian_K=c3=b6nig?= Message-ID: <0adf796d-c0c8-87cc-e7c0-8a29336385f7@gmail.com> Date: Thu, 28 Jan 2021 15:49:03 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: <20210128143554.61100-2-nirmoy.das@amd.com> Content-Language: en-US X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: christian.koenig@amd.com Cc: Alan.Harrison@amd.com, Alexander.Deucher@amd.com, Felix.Kuehling@amd.com, ray.huang@amd.com, Christian.Koenig@amd.com Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" Am 28.01.21 um 15:35 schrieb Nirmoy Das: > Enable gfx wave limiting for gfx jobs before pushing high priority > compute jobs so that high priority compute jobs gets more resources > to finish early. The problem here is what happens if you have multiple high priority jobs running at the same time? Christian > > Signed-off-by: Nirmoy Das > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c > index 024d0a563a65..ee48989dfb4c 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c > @@ -195,6 +195,10 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs, > if ((ib->flags & AMDGPU_IB_FLAG_EMIT_MEM_SYNC) && ring->funcs->emit_mem_sync) > ring->funcs->emit_mem_sync(ring); > > + if (ring->funcs->emit_wave_limit && job && > + job->base.s_priority >= DRM_SCHED_PRIORITY_HIGH) > + ring->funcs->emit_wave_limit(ring, true); > + > if (ring->funcs->insert_start) > ring->funcs->insert_start(ring); > > @@ -295,6 +299,11 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs, > ring->current_ctx = fence_ctx; > if (vm && ring->funcs->emit_switch_buffer) > amdgpu_ring_emit_switch_buffer(ring); > + > + if (ring->funcs->emit_wave_limit && job && > + job->base.s_priority >= DRM_SCHED_PRIORITY_HIGH) > + ring->funcs->emit_wave_limit(ring, false); > + > amdgpu_ring_commit(ring); > return 0; > } _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx