From: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
To: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>, qemu-devel@nongnu.org
Cc: qemu-riscv@nongnu.org, palmer@dabbelt.com,
Alistair.Francis@wdc.com, bmeng.cn@gmail.com,
liwei1518@gmail.com
Subject: Re: [PATCH 5/6] target/riscv: Enable zabha for max cpu
Date: Fri, 24 May 2024 08:38:04 -0300 [thread overview]
Message-ID: <0b1e0da4-647f-40cc-918b-e1a549e0cc58@ventanamicro.com> (raw)
In-Reply-To: <20240523124045.1964-6-zhiwei_liu@linux.alibaba.com>
On 5/23/24 09:40, LIU Zhiwei wrote:
> Signed-off-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
> ---
> target/riscv/cpu.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
> index 21d4e36405..9ec03a1edc 100644
> --- a/target/riscv/cpu.c
> +++ b/target/riscv/cpu.c
> @@ -118,6 +118,7 @@ const RISCVIsaExtData isa_edata_arr[] = {
> ISA_EXT_DATA_ENTRY(zaamo, PRIV_VERSION_1_12_0, ext_zaamo),
> ISA_EXT_DATA_ENTRY(zacas, PRIV_VERSION_1_12_0, ext_zacas),
> ISA_EXT_DATA_ENTRY(zama16b, PRIV_VERSION_1_12_0, ext_zama16b),
> + ISA_EXT_DATA_ENTRY(zabha, PRIV_VERSION_1_12_0, ext_zabha),
I think this should be place right after zaamo. Thanks,
Daniel
> ISA_EXT_DATA_ENTRY(zalrsc, PRIV_VERSION_1_12_0, ext_zalrsc),
> ISA_EXT_DATA_ENTRY(zawrs, PRIV_VERSION_1_12_0, ext_zawrs),
> ISA_EXT_DATA_ENTRY(zfa, PRIV_VERSION_1_12_0, ext_zfa),
> @@ -1470,6 +1471,7 @@ const RISCVCPUMultiExtConfig riscv_cpu_extensions[] = {
> MULTI_EXT_CFG_BOOL("zcmop", ext_zcmop, false),
> MULTI_EXT_CFG_BOOL("zacas", ext_zacas, false),
> MULTI_EXT_CFG_BOOL("zama16b", ext_zama16b, false),
> + MULTI_EXT_CFG_BOOL("zabha", ext_zabha, false),
> MULTI_EXT_CFG_BOOL("zaamo", ext_zaamo, false),
> MULTI_EXT_CFG_BOOL("zalrsc", ext_zalrsc, false),
> MULTI_EXT_CFG_BOOL("zawrs", ext_zawrs, true),
next prev parent reply other threads:[~2024-05-24 11:38 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-23 12:40 [PATCH 0/6] target/riscv: Support Zabha extension LIU Zhiwei
2024-05-23 12:40 ` [PATCH 1/6] target/riscv: Move gen_amo before implement Zabha LIU Zhiwei
2024-06-04 2:25 ` Alistair Francis
2024-05-23 12:40 ` [PATCH 2/6] target/riscv: Add AMO instructions for Zabha LIU Zhiwei
2024-06-04 3:09 ` Alistair Francis
2024-05-23 12:40 ` [PATCH 3/6] target/riscv: Move gen_cmpxchg before adding amocas.[b|h] LIU Zhiwei
2024-06-04 3:15 ` Alistair Francis
2024-05-23 12:40 ` [PATCH 4/6] target/riscv: Add amocas.[b|h] for Zabha LIU Zhiwei
2024-06-04 3:17 ` Alistair Francis
2024-05-23 12:40 ` [PATCH 5/6] target/riscv: Enable zabha for max cpu LIU Zhiwei
2024-05-24 11:38 ` Daniel Henrique Barboza [this message]
2024-05-23 12:40 ` [PATCH 6/6] disas/riscv: Support zabha disassemble LIU Zhiwei
2024-06-04 3:18 ` Alistair Francis
2024-05-24 11:44 ` [PATCH 0/6] target/riscv: Support Zabha extension Daniel Henrique Barboza
2024-05-26 0:37 ` LIU Zhiwei
2024-05-26 17:16 ` Daniel Henrique Barboza
2024-05-27 1:52 ` LIU Zhiwei
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