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Tsirkin" , =?UTF-8?Q?Daniel_P_=2E_Berrang=C3=A9?= , Igor Mammedov , Marcel Apfelbaum , Richard Henderson , Eduardo Habkost Cc: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= , Babu Moger , Ewan Hai , Pu Wen , Tao Su , Yi Lai , Dapeng Mi , qemu-devel@nongnu.org, kvm@vger.kernel.org References: <20250620092734.1576677-1-zhao1.liu@intel.com> <20250620092734.1576677-3-zhao1.liu@intel.com> Content-Language: en-US From: "Mi, Dapeng" In-Reply-To: <20250620092734.1576677-3-zhao1.liu@intel.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 6/20/2025 5:27 PM, Zhao Liu wrote: > The legacy_l2_cache (2nd-level cache: 4 MByte, 16-way set associative, > 64 byte line size) corresponds to descriptor 0x49, but at present > cpuid2_cache_descriptors doesn't support descriptor 0x49 because it has > multiple meanings. > > The 0x49 is necessary when CPUID 0x2 and 0x4 leaves have the consistent > cache model, and use legacy_l2_cache as the default l2 cache. > > Therefore, add descriptor 0x49 to represent general l2 cache. > > Signed-off-by: Zhao Liu > --- > target/i386/cpu.c | 13 ++++++++++++- > 1 file changed, 12 insertions(+), 1 deletion(-) > > diff --git a/target/i386/cpu.c b/target/i386/cpu.c > index e398868a3f8d..995766c9d74c 100644 > --- a/target/i386/cpu.c > +++ b/target/i386/cpu.c > @@ -127,7 +127,18 @@ struct CPUID2CacheDescriptorInfo cpuid2_cache_descriptors[] = { > .associativity = 8, .line_size = 64, }, > [0x48] = { .level = 2, .type = UNIFIED_CACHE, .size = 3 * MiB, > .associativity = 12, .line_size = 64, }, > - /* Descriptor 0x49 depends on CPU family/model, so it is not included */ > + /* > + * Descriptor 0x49 has 2 cases: > + * - 2nd-level cache: 4 MByte, 16-way set associative, 64 byte line size. > + * - 3rd-level cache: 4MB, 16-way set associative, 64-byte line size > + * (Intel Xeon processor MP, Family 0FH, Model 06H). > + * > + * When it represents l3, then it depends on CPU family/model. Fortunately, > + * the legacy cache/CPU models don't have such special l3. So, just add it > + * to represent the general l2 case. For comments and commit message, we'd better use the capital character "L2/L3" to represent the 2nd/3rd level cache which is more conventional.  Others look good to me. Reviewed-by: Dapeng Mi > + */ > + [0x49] = { .level = 2, .type = UNIFIED_CACHE, .size = 4 * MiB, > + .associativity = 16, .line_size = 64, }, > [0x4A] = { .level = 3, .type = UNIFIED_CACHE, .size = 6 * MiB, > .associativity = 12, .line_size = 64, }, > [0x4B] = { .level = 3, .type = UNIFIED_CACHE, .size = 8 * MiB,