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From: Oleksii Kurochko <oleksii.kurochko@gmail.com>
To: Baptiste Le Duc <baptiste.le-duc@vates.tech>
Cc: xen-devel@lists.xenproject.org,
	"Romain Caritey" <Romain.Caritey@microchip.com>,
	"Zheng Zhang" <zhangzheng@iscas.ac.cn>,
	"Alistair Francis" <alistair.francis@wdc.com>,
	"Connor Davis" <connojdavis@gmail.com>,
	"Andrew Cooper" <andrew.cooper3@citrix.com>,
	"Anthony PERARD" <anthony.perard@vates.tech>,
	"Michal Orzel" <michal.orzel@amd.com>,
	"Jan Beulich" <jbeulich@suse.com>,
	"Julien Grall" <julien@xen.org>,
	"Roger Pau Monné" <roger@xenproject.org>,
	"Stefano Stabellini" <sstabellini@kernel.org>
Subject: Re: [PATCH v3 12/39] xen/riscv: save and restore vsiselect on vCPU context switch
Date: Wed, 14 Oct 2026 16:53:06 +0200	[thread overview]
Message-ID: <0b6b4bef-11c4-486b-8b9b-e46648b2207e@gmail.com> (raw)
In-Reply-To: <1791363264.8631fc262581453bbf619ec5b2062170.1a1159231980003f66@vates.tech>



On 10/7/26 10:53 AM, Baptiste Le Duc wrote:
>> vsiselect is a per-hart CSR which a guest changes on its own: when V=1,
>> VS-mode accesses to siselect are really accesses to vsiselect.
>> Architecturally a vCPU has to find there the value it last wrote, but as
>> long as the CSR isn't part of the vCPU context it finds whatever selector
>> the vCPU which ran on the hart before it left behind. A guest which writes
>> siselect, is descheduled and then reads sireg without rewriting siselect
>> therefore reaches a register it never selected, and it can also observe
>> another guest's selector value.
> Nit: I'd suggest a more tighter version that might be more clear. Feel
> free to use it:
> 
>      ```
>      vsiselect isn't saved/restored, yet the guest writes it directly (VS-mode
>      accesses to siselect go to vsiselect). After a context switch a vCPU
>      therefore sees the selector left by the previous vCPU on that hart: a guest
>      writing siselect, getting descheduled, then accessing sireg hits a register
>      it never selected, and it can observe another guest's selector value.
>      ```
> 

that's clearer. I'll take it.

>>
>> When Smstateen is implemented, access to vsiselect and vsireg is gated by
>> hstateen0.CSRIND (bit 60, SMSTATEEN0_SVSLCT in Xen's headers), and
>> v->arch.hstateen0 holds the bits vcpu_csr_init() ended up with. A clear
>> bit there covers the two cases in which the CSR has to be skipped:
>>
>>   - Xen didn't hand the guest access to it, so the guest can't have changed
>>     the CSR and there is no state to preserve;
>>   - M-mode denied the state altogether. Smstateen makes a bit which is zero
>>     in mstateen0 read-only zero in hstateen0, and a zero bit in mstateen0
>>     traps accesses from every privilege mode less privileged than M-mode,
>>     HS-mode included, so Xen couldn't even read the CSR to save it.
>>
>> Without Smstateen no bit controls access to the CSR, so it is saved and
>> restored whenever Ssaia is available.
>>
>> Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
> 
> Reviewed-by: Baptiste Le Duc <baptiste.le-duc@vates.tech>

Thanks!

~ Oleksii


  reply	other threads:[~2026-10-14 14:53 UTC|newest]

Thread overview: 80+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-30 16:18 [PATCH v3 00/39] [PATCH v2 00/39] [RISC-V] virtual interrupt controller (vAPLIC/vIMSIC) support Oleksii Kurochko
2026-09-30 16:18 ` [PATCH v3 01/39] xen/riscv: drop INSN_{16,32}BIT_MASK and report unknown instruction lengths Oleksii Kurochko
2026-10-05 10:01   ` Baptiste Le Duc
2026-10-08 14:35     ` Jan Beulich
2026-09-30 16:18 ` [PATCH v3 02/39] xen/riscv: set the domain type for 64-bit kernel images Oleksii Kurochko
2026-10-05 10:01   ` Baptiste Le Duc
2026-10-08 14:36     ` Jan Beulich
2026-09-30 16:18 ` [PATCH v3 03/39] xen/riscv: introduce csr_volatile_read64() Oleksii Kurochko
2026-10-05 10:01   ` Baptiste Le Duc
2026-10-09 13:29     ` Oleksii Kurochko
2026-10-08 14:46   ` Jan Beulich
2026-10-09 14:00     ` Oleksii Kurochko
2026-10-09 14:19       ` Jan Beulich
2026-09-30 16:18 ` [PATCH v3 04/39] xen/riscv: request a G-stage flush on vmenter when VMIDs are disabled Oleksii Kurochko
2026-10-05 10:01   ` Baptiste Le Duc
2026-10-08 14:53     ` Jan Beulich
2026-09-30 16:18 ` [PATCH v3 05/39] xen/riscv: use ~0 instead of ULONG_MAX to disable the VS-timer Oleksii Kurochko
2026-10-08 14:54   ` Jan Beulich
2026-09-30 16:18 ` [PATCH v3 06/39] xen/riscv: introduce device-agnostic MMIO emulation dispatch Oleksii Kurochko
2026-10-05 10:01   ` Baptiste Le Duc
2026-10-08 14:57     ` Jan Beulich
2026-10-12 13:51       ` Oleksii Kurochko
2026-10-12 13:50     ` Oleksii Kurochko
2026-10-12 15:28   ` Jan Beulich
2026-10-14 10:51     ` Oleksii Kurochko
2026-09-30 16:18 ` [PATCH v3 07/39] xen/riscv: introduce CPU_NONE Oleksii Kurochko
2026-10-05 14:53   ` Baptiste Le Duc
2026-10-12 14:27     ` Oleksii Kurochko
2026-10-12 15:40   ` Jan Beulich
2026-10-14 11:35     ` Oleksii Kurochko
2026-09-30 16:18 ` [PATCH v3 08/39] xen/riscv: implement virtual APLIC MMIO emulation Oleksii Kurochko
2026-10-05 14:53   ` Baptiste Le Duc
2026-10-13 16:06     ` Oleksii Kurochko
2026-10-14  6:16       ` Jan Beulich
2026-10-14 11:45         ` Oleksii Kurochko
2026-10-14 13:52   ` Jan Beulich
2026-09-30 16:18 ` [PATCH v3 09/39] xen/riscv: build the target hart index via aplic_hart_index() Oleksii Kurochko
2026-10-06  9:02   ` Baptiste Le Duc
2026-10-14 13:42     ` Oleksii Kurochko
2026-10-14 14:03   ` Jan Beulich
2026-09-30 16:23 ` [PATCH v3 10/39] xen/riscv: add helper to check APLIC MSI mode Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 11/39] xen/riscv: implement vCPU context switching Oleksii Kurochko
2026-10-06 16:50   ` Baptiste Le Duc
2026-10-07  8:04     ` Jan Beulich
2026-10-07  8:27       ` Baptiste Le Duc
2026-10-14 14:05     ` Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 12/39] xen/riscv: save and restore vsiselect on vCPU context switch Oleksii Kurochko
2026-10-07  8:53   ` Baptiste Le Duc
2026-10-14 14:53     ` Oleksii Kurochko [this message]
2026-09-30 16:23 ` [PATCH v3 13/39] xen/riscv: introduce vintc_ctxt_switch_{from,to}() Oleksii Kurochko
2026-10-07  9:11   ` Baptiste Le Duc
2026-09-30 16:23 ` [PATCH v3 14/39] xen/riscv: add IMSIC vCPU context switch handlers Oleksii Kurochko
2026-10-08  9:54   ` Baptiste Le Duc
2026-10-14 15:12     ` Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 15/39] xen/riscv: extend exception tables with type and data fields Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 16/39] xen/riscv: decouple INSN_PSEUDO_VS_* from the hypervisor's XLEN Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 17/39] xen/riscv: add guest page fault handling stub Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 18/39] xen/riscv: implement trap redirection to a guest Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 19/39] xen/riscv: detect Shtvala Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 20/39] xen/riscv: resolve the faulting guest physical address Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 21/39] xen/riscv: add guest memory read helper Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 22/39] xen/riscv: look up the exception table for any trap taken in Xen context Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 23/39] xen/riscv: add helpers for decoding a trapped load or store Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 24/39] xen/riscv: add guest load emulation for trapped MMIO accesses Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 25/39] xen/riscv: add guest store " Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 26/39] xen/riscv: introduce arch_move_irqs() Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 27/39] xen/riscv: handle the case when no vCPU migration is needed Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 28/39] xen/riscv: introduce vaplic_reconfigure_target() Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 29/39] xen/riscv: prepare new IMSIC VS-file Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 30/39] xen/riscv: implement APLIC-IMSIC-hart sync barrier for vCPU migration Oleksii Kurochko
2026-10-06 14:25   ` Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 31/39] xen/riscv: remap interrupts to new IMSIC VS-file Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 32/39] xen/riscv: save and clear the old IMSIC VS-file on vCPU migration Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 33/39] xen/riscv: restore register state in the new IMSIC VS-file Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 34/39] xen/riscv: add basic VGEIN management for AIA guests Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 35/39] xen/riscv: wake up a descheduled vCPU on a guest external interrupt Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 36/39] xen/riscv: map IMSIC interrupt file for vCPUs Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 37/39] xen/riscv: implement continue_new_vcpu() Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 38/39] xen/riscv: set the guest's XLEN explicitly in hstatus.VSXL Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 39/39] xen/riscv: introduce IMSIC h/w interrupt file attaching to vcpu Oleksii Kurochko

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