Re: [kvm-unit-tests PATCH 2/2] nVMX: Test IA32_DEBUGCTLMSR behavior on set and cleared save/load debug controls

[Chenyi Qiang <chenyi.qiang@intel.com>]

On 5/20/2026 11:36 PM, Sean Christopherson wrote:
> On Mon, Aug 11, 2025, Xiaoyao Li wrote:
>> On 8/11/2025 2:30 PM, Chenyi Qiang wrote:
>>> Besides the existing DR7 test on debug controls, introduce a similar
>>> separate test for IA32_DEBUGCTLMSR.
>>>
>>> Previously, the IA32_DEBUGCTLMSR was combined with the DR7 test. However,
>>> it attempted to access the LBR and BTF bits in the MSR which can be
>>> invalid. Although KVM will exempt these two bits from validity check,
>>> they will be cleared and resulted in the unexpected MSR value.
>>
>> Initially, LBR (bit 0) and BTF(bit 1) have been allowed to write by the
>> guest but the value are dropped, as the workaround to not break some OS that
>> writes to the MSR unconditionally.
>>
>> BTF never gets supported by KVM. While LBR gained support but it depends on
>> PMU and LBR being exposed to the guest, which requires additional parameters
>> to the test configuration.
>>
>> On the other hand, DEBUGCTLMSR_BUS_LOCK_DETECT chosen by this patch doesn't
>> require additional parameter, but it requires the hardware support of the
>> feature. IIRC, it needs to be SPR and later. So it has less coverage of
>> hardwares than LBR.
>>
>> I'm not sure the preference of Sean/Paolo. Let's see what they would say.
> 
> I would say add dedicated tests (for BUS_LOCK_DETECT and LBR), and get any coverage
> for KVM's handling of DEBUGCTL reads and writes as a side effect.

Thanks Sean for your comments. I will pick up this series and post a new version.