From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chris Wilson Subject: Re: [PATCH] drm/i915: make DP training try a little harder Date: Wed, 05 Jan 2011 10:43:41 +0000 Message-ID: <0d30dc$klk0jr@orsmga001.jf.intel.com> References: <1294170794-5334-1-git-send-email-jbarnes@virtuousgeek.org> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTP id 79BFE9E732 for ; Wed, 5 Jan 2011 02:43:44 -0800 (PST) In-Reply-To: <1294170794-5334-1-git-send-email-jbarnes@virtuousgeek.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Jesse Barnes , intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Tue, 4 Jan 2011 11:53:14 -0800, Jesse Barnes wrote: > When trying to do channel equalization, we need to make sure we still > have clock recovery on all lanes while training. We also need to try > clock recovery again if we lose the clock or if channel eq fails 5 > times. We'll try clock recovery up to 5 more times before giving up > entirely. > > Gets suspend/resume working on my Vaio again and brings us back into > compliance with the DP training sequence spec. There are still ways link training can silently fail. The next task for the foolhardy is return error codes from modesetting (and accept that any failure can leave the system in a partially defined state, with a forced mode reset in the drm_kms_helper?). > - /* Try 5 times */ > - if (tries > 5) > + /* Try 5 times, then try clock recovery if that fails */ > + if (tries > 5) { > + intel_dp_link_down(intel_dp); > + intel_dp_start_link_train(intel_dp); > + tries = 0; > + cr_tries++; > break; This should be a continue, right?. -Chris -- Chris Wilson, Intel Open Source Technology Centre