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From: Mayank Rana <quic_mrana@quicinc.com>
To: "Krishna chaitanya chundru" <quic_krichai@quicinc.com>,
	"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Kishon Vijay Abraham I" <kishon@kernel.org>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Jonathan Corbet" <corbet@lwn.net>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Rob Herring" <robh@kernel.org>
Cc: <linux-pci@vger.kernel.org>, <linux-doc@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>, <linux-arm-msm@vger.kernel.org>,
	<mhi@lists.linux.dev>, <quic_vbadigan@quicinc.com>,
	<quic_ramkri@quicinc.com>, <quic_nitegupt@quicinc.com>,
	<quic_skananth@quicinc.com>, <quic_parass@quicinc.com>,
	Manivannan Sadhasivam <mani@kernel.org>
Subject: Re: [PATCH v7 2/4] PCI: qcom-ep: Add support for D-state change notification
Date: Wed, 10 Jul 2024 13:28:58 -0700	[thread overview]
Message-ID: <0d659413-1122-402a-bf85-aa9abb720850@quicinc.com> (raw)
In-Reply-To: <20240710-dstate_notifier-v7-2-8d45d87b2b24@quicinc.com>



On 7/10/2024 4:08 AM, Krishna chaitanya chundru wrote:
> Add support to pass D-state change notification to Endpoint
> function driver.
> Read perst value to determine if the link is in D3Cold/D3hot.
> 
> Reviewed-by: Manivannan Sadhasivam <mani@kernel.org>
> Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com>
> ---
>   drivers/pci/controller/dwc/pcie-qcom-ep.c | 8 +++++++-
>   1 file changed, 7 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/pci/controller/dwc/pcie-qcom-ep.c b/drivers/pci/controller/dwc/pcie-qcom-ep.c
> index 236229f66c80..817fad805c51 100644
> --- a/drivers/pci/controller/dwc/pcie-qcom-ep.c
> +++ b/drivers/pci/controller/dwc/pcie-qcom-ep.c
> @@ -648,6 +648,7 @@ static irqreturn_t qcom_pcie_ep_global_irq_thread(int irq, void *data)
>   	struct device *dev = pci->dev;
>   	u32 status = readl_relaxed(pcie_ep->parf + PARF_INT_ALL_STATUS);
>   	u32 mask = readl_relaxed(pcie_ep->parf + PARF_INT_ALL_MASK);
> +	pci_power_t state;
>   	u32 dstate, val;
>   
>   	writel_relaxed(status, pcie_ep->parf + PARF_INT_ALL_CLEAR);
> @@ -671,11 +672,16 @@ static irqreturn_t qcom_pcie_ep_global_irq_thread(int irq, void *data)
>   		dstate = dw_pcie_readl_dbi(pci, DBI_CON_STATUS) &
>   					   DBI_CON_STATUS_POWER_STATE_MASK;
>   		dev_dbg(dev, "Received D%d state event\n", dstate);
> -		if (dstate == 3) {
> +		state = dstate;
> +		if (dstate == PCI_D3hot) {
>   			val = readl_relaxed(pcie_ep->parf + PARF_PM_CTRL);
>   			val |= PARF_PM_CTRL_REQ_EXIT_L1;
>   			writel_relaxed(val, pcie_ep->parf + PARF_PM_CTRL);
Can you please also check that do we really need to bring link back out 
of L1/L1SS on receiving D3 hot ?
> +			if (gpiod_get_value(pcie_ep->reset))
> +				state = PCI_D3cold;
>   		}
> +		pci_epc_dstate_notify(pci->ep.epc, state);
>   	} else if (FIELD_GET(PARF_INT_ALL_LINK_UP, status)) {
>   		dev_dbg(dev, "Received Linkup event. Enumeration complete!\n");
>   		dw_pcie_ep_linkup(&pci->ep);
> 

Regards,
Mayank

  parent reply	other threads:[~2024-07-10 20:29 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-07-10 11:08 [PATCH v7 0/4] PCI: endpoint: add D-state change notifier support Krishna chaitanya chundru
2024-07-10 11:08 ` [PATCH v7 1/4] PCI: endpoint: Add " Krishna chaitanya chundru
2024-07-10 11:08 ` [PATCH v7 2/4] PCI: qcom-ep: Add support for D-state change notification Krishna chaitanya chundru
2024-07-10 12:11   ` Bjorn Helgaas
2024-07-11  6:27     ` Krishna Chaitanya Chundru
2024-07-11 18:48       ` Bjorn Helgaas
2024-07-29 12:08         ` Krishna Chaitanya Chundru
2024-07-10 20:28   ` Mayank Rana [this message]
2024-07-23  3:37   ` Yogesh Jadav
2024-07-10 11:08 ` [PATCH v7 3/4] PCI: qcom-ep: Print D-state name to distinguish D3hot/D3cold Krishna chaitanya chundru
2024-07-10 11:08 ` [PATCH v7 4/4] PCI: epf-mhi: Add support for handling D-state notify from EPC Krishna chaitanya chundru

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