From: Luca Barbieri <ldb@ldb.ods.org>
To: Sebastian Droege <sebastian.droege@gmx.de>
Cc: Linux-Kernel ML <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] [RFC] [2.5 i386] GCC 3.1 -march support, PPRO_FENCE reduction, prefetch fixes and other CPU-related changes
Date: 04 Aug 2002 17:43:23 +0200 [thread overview]
Message-ID: <1028475803.1294.529.camel@ldb> (raw)
In-Reply-To: <20020804173245.1e3254f7.sebastian.droege@gmx.de>
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> is there really support for SSE prefetch in athlons _without_ SSE?!
> I don't know but this seems wrong...
Yes, according to
<http://www.amd.com/products/cpg/athlon/techdocs/pdf/22466.pdf>.
AMD added several intructions in Athlons including movntq, sfence and
prefetchnta/t0/t1/t2.
The last 4 instructions are what I call "SSE prefetch" (they could
called MMXEXT prefetch instead, but it's not much better).
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next prev parent reply other threads:[~2002-08-04 15:39 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2002-08-04 14:27 [PATCH] [RFC] [2.5 i386] GCC 3.1 -march support, PPRO_FENCE reduction, prefetch fixes and other CPU-related changes Luca Barbieri
2002-08-04 14:36 ` Thunder from the hill
2002-08-04 15:32 ` Sebastian Droege
2002-08-04 15:43 ` Luca Barbieri [this message]
2002-08-04 15:50 ` Alan Cox
2002-08-04 14:44 ` Luca Barbieri
2002-08-04 18:59 ` J.A. Magallon
2002-08-04 20:23 ` Luca Barbieri
2002-08-04 21:51 ` Alan Cox
2002-08-04 21:54 ` Alan Cox
2002-08-04 20:43 ` Luca Barbieri
2002-08-05 0:02 ` Alan Cox
2002-08-05 8:12 ` Luca Barbieri
2002-08-05 9:49 ` Alan Cox
2002-08-05 9:31 ` Luca Barbieri
2002-08-05 11:05 ` Alan Cox
2002-08-05 9:53 ` Luca Barbieri
2002-08-05 11:26 ` Alan Cox
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