From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from perceval.ideasonboard.com ([213.167.242.64]:45152 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S967338AbeEXLu1 (ORCPT ); Thu, 24 May 2018 07:50:27 -0400 From: Laurent Pinchart To: Kieran Bingham Cc: linux-renesas-soc@vger.kernel.org, linux-media@vger.kernel.org, dri-devel@lists.freedesktop.org Subject: Re: [PATCH v4 11/11] drm: rcar-du: Support interlaced video output through vsp1 Date: Thu, 24 May 2018 14:50:23 +0300 Message-ID: <10463435.CoRpyeppX3@avalon> In-Reply-To: <0c7e8033195d0a80af9a353b01c116778c568e04.1525354194.git-series.kieran.bingham+renesas@ideasonboard.com> References: <0c7e8033195d0a80af9a353b01c116778c568e04.1525354194.git-series.kieran.bingham+renesas@ideasonboard.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Sender: linux-renesas-soc-owner@vger.kernel.org List-ID: Hi Kieran, Thank you for the patch. On Thursday, 3 May 2018 16:36:22 EEST Kieran Bingham wrote: > Use the newly exposed VSP1 interface to enable interlaced frame support > through the VSP1 lif pipelines. s/lif/LIF/ > > Signed-off-by: Kieran Bingham > --- > drivers/gpu/drm/rcar-du/rcar_du_crtc.c | 1 + > drivers/gpu/drm/rcar-du/rcar_du_vsp.c | 3 +++ > 2 files changed, 4 insertions(+) > > diff --git a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c > b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c index d71d709fe3d9..206532959ec9 > 100644 > --- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c > +++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c > @@ -289,6 +289,7 @@ static void rcar_du_crtc_set_display_timing(struct > rcar_du_crtc *rcrtc) /* Signal polarities */ > value = ((mode->flags & DRM_MODE_FLAG_PVSYNC) ? DSMR_VSL : 0) > | ((mode->flags & DRM_MODE_FLAG_PHSYNC) ? DSMR_HSL : 0) > + | ((mode->flags & DRM_MODE_FLAG_INTERLACE) ? DSMR_ODEV : 0) How will this affect Gen2 ? Could you document what this change does in the commit message ? > | DSMR_DIPM_DISP | DSMR_CSPM; > > rcar_du_crtc_write(rcrtc, DSMR, value); > > diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c > b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c index af7822a66dee..c7b37232ee91 > 100644 > --- a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c > +++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c > @@ -186,6 +186,9 @@ static void rcar_du_vsp_plane_setup(struct > rcar_du_vsp_plane *plane) }; > unsigned int i; > > + cfg.interlaced = !!(plane->plane.state->crtc->mode.flags > + & DRM_MODE_FLAG_INTERLACE); > + > cfg.src.left = state->state.src.x1 >> 16; > cfg.src.top = state->state.src.y1 >> 16; > cfg.src.width = drm_rect_width(&state->state.src) >> 16; -- Regards, Laurent Pinchart From mboxrd@z Thu Jan 1 00:00:00 1970 From: Laurent Pinchart Subject: Re: [PATCH v4 11/11] drm: rcar-du: Support interlaced video output through vsp1 Date: Thu, 24 May 2018 14:50:23 +0300 Message-ID: <10463435.CoRpyeppX3@avalon> References: <0c7e8033195d0a80af9a353b01c116778c568e04.1525354194.git-series.kieran.bingham+renesas@ideasonboard.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) by gabe.freedesktop.org (Postfix) with ESMTPS id 89F946E010 for ; Thu, 24 May 2018 11:50:28 +0000 (UTC) In-Reply-To: <0c7e8033195d0a80af9a353b01c116778c568e04.1525354194.git-series.kieran.bingham+renesas@ideasonboard.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Kieran Bingham Cc: linux-renesas-soc@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-media@vger.kernel.org List-Id: dri-devel@lists.freedesktop.org SGkgS2llcmFuLAoKVGhhbmsgeW91IGZvciB0aGUgcGF0Y2guCgpPbiBUaHVyc2RheSwgMyBNYXkg MjAxOCAxNjozNjoyMiBFRVNUIEtpZXJhbiBCaW5naGFtIHdyb3RlOgo+IFVzZSB0aGUgbmV3bHkg ZXhwb3NlZCBWU1AxIGludGVyZmFjZSB0byBlbmFibGUgaW50ZXJsYWNlZCBmcmFtZSBzdXBwb3J0 Cj4gdGhyb3VnaCB0aGUgVlNQMSBsaWYgcGlwZWxpbmVzLgoKcy9saWYvTElGLwoKPiAKPiBTaWdu ZWQtb2ZmLWJ5OiBLaWVyYW4gQmluZ2hhbSA8a2llcmFuLmJpbmdoYW0rcmVuZXNhc0BpZGVhc29u Ym9hcmQuY29tPgo+IC0tLQo+ICBkcml2ZXJzL2dwdS9kcm0vcmNhci1kdS9yY2FyX2R1X2NydGMu YyB8IDEgKwo+ICBkcml2ZXJzL2dwdS9kcm0vcmNhci1kdS9yY2FyX2R1X3ZzcC5jICB8IDMgKysr Cj4gIDIgZmlsZXMgY2hhbmdlZCwgNCBpbnNlcnRpb25zKCspCj4gCj4gZGlmZiAtLWdpdCBhL2Ry aXZlcnMvZ3B1L2RybS9yY2FyLWR1L3JjYXJfZHVfY3J0Yy5jCj4gYi9kcml2ZXJzL2dwdS9kcm0v cmNhci1kdS9yY2FyX2R1X2NydGMuYyBpbmRleCBkNzFkNzA5ZmUzZDkuLjIwNjUzMjk1OWVjOQo+ IDEwMDY0NAo+IC0tLSBhL2RyaXZlcnMvZ3B1L2RybS9yY2FyLWR1L3JjYXJfZHVfY3J0Yy5jCj4g KysrIGIvZHJpdmVycy9ncHUvZHJtL3JjYXItZHUvcmNhcl9kdV9jcnRjLmMKPiBAQCAtMjg5LDYg KzI4OSw3IEBAIHN0YXRpYyB2b2lkIHJjYXJfZHVfY3J0Y19zZXRfZGlzcGxheV90aW1pbmcoc3Ry dWN0Cj4gcmNhcl9kdV9jcnRjICpyY3J0YykgLyogU2lnbmFsIHBvbGFyaXRpZXMgKi8KPiAgCXZh bHVlID0gKChtb2RlLT5mbGFncyAmIERSTV9NT0RFX0ZMQUdfUFZTWU5DKSA/IERTTVJfVlNMIDog MCkKPiAgCSAgICAgIHwgKChtb2RlLT5mbGFncyAmIERSTV9NT0RFX0ZMQUdfUEhTWU5DKSA/IERT TVJfSFNMIDogMCkKPiArCSAgICAgIHwgKChtb2RlLT5mbGFncyAmIERSTV9NT0RFX0ZMQUdfSU5U RVJMQUNFKSA/IERTTVJfT0RFViA6IDApCgpIb3cgd2lsbCB0aGlzIGFmZmVjdCBHZW4yID8gQ291 bGQgeW91IGRvY3VtZW50IHdoYXQgdGhpcyBjaGFuZ2UgZG9lcyBpbiB0aGUgCmNvbW1pdCBtZXNz YWdlID8KCj4gIAkgICAgICB8IERTTVJfRElQTV9ESVNQIHwgRFNNUl9DU1BNOwo+IAo+ICAJcmNh cl9kdV9jcnRjX3dyaXRlKHJjcnRjLCBEU01SLCB2YWx1ZSk7Cj4gCj4gZGlmZiAtLWdpdCBhL2Ry aXZlcnMvZ3B1L2RybS9yY2FyLWR1L3JjYXJfZHVfdnNwLmMKPiBiL2RyaXZlcnMvZ3B1L2RybS9y Y2FyLWR1L3JjYXJfZHVfdnNwLmMgaW5kZXggYWY3ODIyYTY2ZGVlLi5jN2IzNzIzMmVlOTEKPiAx MDA2NDQKPiAtLS0gYS9kcml2ZXJzL2dwdS9kcm0vcmNhci1kdS9yY2FyX2R1X3ZzcC5jCj4gKysr IGIvZHJpdmVycy9ncHUvZHJtL3JjYXItZHUvcmNhcl9kdV92c3AuYwo+IEBAIC0xODYsNiArMTg2 LDkgQEAgc3RhdGljIHZvaWQgcmNhcl9kdV92c3BfcGxhbmVfc2V0dXAoc3RydWN0Cj4gcmNhcl9k dV92c3BfcGxhbmUgKnBsYW5lKSB9Owo+ICAJdW5zaWduZWQgaW50IGk7Cj4gCj4gKwljZmcuaW50 ZXJsYWNlZCA9ICEhKHBsYW5lLT5wbGFuZS5zdGF0ZS0+Y3J0Yy0+bW9kZS5mbGFncwo+ICsJCQkg ICAgJiBEUk1fTU9ERV9GTEFHX0lOVEVSTEFDRSk7Cj4gKwo+ICAJY2ZnLnNyYy5sZWZ0ID0gc3Rh dGUtPnN0YXRlLnNyYy54MSA+PiAxNjsKPiAgCWNmZy5zcmMudG9wID0gc3RhdGUtPnN0YXRlLnNy Yy55MSA+PiAxNjsKPiAgCWNmZy5zcmMud2lkdGggPSBkcm1fcmVjdF93aWR0aCgmc3RhdGUtPnN0 YXRlLnNyYykgPj4gMTY7CgotLSAKUmVnYXJkcywKCkxhdXJlbnQgUGluY2hhcnQKCgoKX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KZHJpLWRldmVsIG1haWxp bmcgbGlzdApkcmktZGV2ZWxAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCmh0dHBzOi8vbGlzdHMuZnJl ZWRlc2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8vZHJpLWRldmVsCg==