From: "Rojewski, Cezary" <cezary.rojewski@intel.com>
To: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: "pierre-louis.bossart@linux.intel.com"
<pierre-louis.bossart@linux.intel.com>,
"alsa-devel@alsa-project.org" <alsa-devel@alsa-project.org>,
"Kaczmarski, Filip" <filip.kaczmarski@intel.com>,
"N, Harshapriya" <harshapriya.n@intel.com>,
"Barlik, Marcin" <marcin.barlik@intel.com>,
"zwisler@google.com" <zwisler@google.com>,
"lgirdwood@gmail.com" <lgirdwood@gmail.com>,
"tiwai@suse.com" <tiwai@suse.com>,
"Proborszcz, Filip" <filip.proborszcz@intel.com>,
"broonie@kernel.org" <broonie@kernel.org>,
"amadeuszx.slawinski@linux.intel.com"
<amadeuszx.slawinski@linux.intel.com>,
"Wasko, Michal" <michal.wasko@intel.com>,
"cujomalainey@chromium.org" <cujomalainey@chromium.org>,
"Hejmowski, Krzysztof" <krzysztof.hejmowski@intel.com>,
"Papierkowski, Piotr \(Habana\)" <ppapierkowski@habana.ai>,
"Gopal, Vamshi Krishna" <vamshi.krishna.gopal@intel.com>
Subject: RE: [PATCH v5 01/13] ASoC: Intel: Add catpt device
Date: Thu, 17 Sep 2020 15:15:07 +0000 [thread overview]
Message-ID: <106a660275de43fd93cce153b529ef2a@intel.com> (raw)
In-Reply-To: <20200916152455.GP3956970@smile.fi.intel.com>
On 2020-09-16 5:24 PM, Andy Shevchenko wrote:
> On Tue, Sep 15, 2020 at 06:29:32PM +0200, Cezary Rojewski wrote:
>> Declare base structures, registers and device routines for the catpt
>> solution. Catpt deprecates and is a direct replacement for
>> sound/soc/intel/haswell. Supports Lynxpoint and Wildcat Point both.
>
> Few nit-picks below. Overall looks good, FWIW,
> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
>
...
>> +#include <linux/acpi.h>
>> +#include <linux/dma-mapping.h>
>> +#include <linux/interrupt.h>
>> +#include <linux/module.h>
>> +#include <linux/platform_device.h>
>> +#include <linux/pm_runtime.h>
>
>> +#include <linux/pci.h>
>
> Perhaps sorted?
>
Ack. fixed in v6.
>> +#include <sound/soc.h>
>> +#include <sound/soc-acpi.h>
>> +#include <sound/soc-acpi-intel-match.h>
>> +#include "core.h"
>> +#include "registers.h"
>> +
>> +#define CREATE_TRACE_POINTS
>> +#include "trace.h"
>> +
>> +static int __maybe_unused catpt_suspend(struct device *dev)
>> +{
>> + struct catpt_dev *cdev = dev_get_drvdata(dev);
>> + struct dma_chan *chan;
>> + int ret;
>> +
>> + chan = catpt_dma_request_config_chan(cdev);
>> + if (IS_ERR(chan))
>> + return PTR_ERR(chan);
>> +
>> + memset(&cdev->dx_ctx, 0, sizeof(cdev->dx_ctx));
>> + ret = catpt_ipc_enter_dxstate(cdev, CATPT_DX_STATE_D3, &cdev->dx_ctx);
>> + if (ret) {
>> + ret = CATPT_IPC_ERROR(ret);
>> + goto exit;
>> + }
>> +
>> + ret = catpt_dsp_stall(cdev, true);
>> + if (ret)
>> + goto exit;
>> +
>> + ret = catpt_store_memdumps(cdev, chan);
>> + if (ret) {
>> + dev_err(cdev->dev, "store memdumps failed: %d\n", ret);
>> + goto exit;
>> + }
>> +
>> + ret = catpt_store_module_states(cdev, chan);
>> + if (ret) {
>> + dev_err(cdev->dev, "store module states failed: %d\n", ret);
>> + goto exit;
>> + }
>> +
>> + ret = catpt_store_streams_context(cdev, chan);
>> + if (ret) {
>> + dev_err(cdev->dev, "store streams ctx failed: %d\n", ret);
>> + goto exit;
>> + }
>
>> +exit:
>
> I would rather name it as 'out_dma_release' or so to explain what's going to be
> done.
>
I find more descriptive labels inviting reader into: "this is an error
path" thinking and that's why I prefer to stick with simple 'exit'. If
you think that's not a way to go, can change this.
>> + dma_release_channel(chan);
>> + if (ret)
>> + return ret;
>> + return cdev->spec->power_down(cdev);
>> +}
>> +
>> +static int __maybe_unused catpt_resume(struct device *dev)
>> +{
>> + struct catpt_dev *cdev = dev_get_drvdata(dev);
>> + int ret, i;
>> +
>> + ret = cdev->spec->power_up(cdev);
>> + if (ret)
>> + return ret;
>> +
>> + if (!module_is_live(dev->driver->owner)) {
>> + dev_info(dev, "module unloading, skipping fw boot\n");
>> + return 0;
>> + }
>> +
>> + ret = catpt_boot_firmware(cdev, true);
>> + if (ret) {
>> + dev_err(cdev->dev, "boot firmware failed: %d\n", ret);
>> + return ret;
>> + }
>> +
>> + /* reconfigure SSP devices after dx transition */
>
> Dx ?
>
Reworded in v6, thanks.
next prev parent reply other threads:[~2020-09-17 15:17 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-15 16:29 [PATCH v5 00/13] ASoC: Intel: Catpt - Lynx and Wildcat point Cezary Rojewski
2020-09-15 16:29 ` [PATCH v5 01/13] ASoC: Intel: Add catpt device Cezary Rojewski
2020-09-16 15:24 ` Andy Shevchenko
2020-09-16 16:56 ` Andy Shevchenko
2020-09-16 18:30 ` Rojewski, Cezary
2020-09-16 19:12 ` Andy Shevchenko
2020-09-16 19:53 ` Rojewski, Cezary
2020-09-17 10:58 ` Liam Girdwood
2020-09-17 15:15 ` Rojewski, Cezary [this message]
2020-09-21 10:59 ` Rojewski, Cezary
2020-09-15 16:29 ` [PATCH v5 02/13] ASoC: Intel: catpt: Define DSP operations Cezary Rojewski
2020-09-16 15:44 ` Andy Shevchenko
2020-09-17 15:29 ` Rojewski, Cezary
2020-09-18 13:52 ` Andy Shevchenko
2020-09-21 10:54 ` Rojewski, Cezary
2020-09-15 16:29 ` [PATCH v5 03/13] ASoC: Intel: catpt: Firmware loading and context restore Cezary Rojewski
2020-09-16 16:58 ` Andy Shevchenko
2020-09-15 16:29 ` [PATCH v5 04/13] ASoC: Intel: catpt: Implement IPC protocol Cezary Rojewski
2020-09-15 16:29 ` [PATCH v5 05/13] ASoC: Intel: catpt: Add IPC messages Cezary Rojewski
2020-09-15 16:29 ` [PATCH v5 06/13] ASoC: Intel: catpt: PCM operations Cezary Rojewski
2020-09-15 16:29 ` [PATCH v5 07/13] ASoC: Intel: catpt: Event tracing Cezary Rojewski
2020-09-15 16:29 ` [PATCH v5 08/13] ASoC: Intel: catpt: Simple sysfs attributes Cezary Rojewski
2020-09-16 16:50 ` Andy Shevchenko
2020-09-17 15:37 ` Rojewski, Cezary
2020-09-18 13:54 ` Andy Shevchenko
2020-09-15 16:29 ` [PATCH v5 09/13] ASoC: Intel: Select catpt and deprecate haswell Cezary Rojewski
2020-09-15 16:29 ` [PATCH v5 10/13] ASoC: Intel: haswell: Remove haswell-solution specific code Cezary Rojewski
2020-09-16 15:50 ` Andy Shevchenko
2020-09-15 16:29 ` [PATCH v5 11/13] ASoC: Intel: broadwell: " Cezary Rojewski
2020-09-15 16:29 ` [PATCH v5 12/13] ASoC: Intel: bdw-5650: " Cezary Rojewski
2020-09-15 16:29 ` [PATCH v5 13/13] ASoC: Intel: bdw-5677: " Cezary Rojewski
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