From: Sergey Podstavin <podstavin@dev.rtsoft.ru>
To: Matthew Dharm <mdharm@momenco.com>
Cc: Pavel Kiryukhin <savl@dev.rtsoft.ru>,
"linux-mips@linux-mips.org" <linux-mips@linux-mips.org>
Subject: Marvell MV64340 documentation
Date: 27 Jan 2004 21:44:31 +0300 [thread overview]
Message-ID: <1075229071.4058.46.camel@podstavin.dev.rtsoft.ru> (raw)
Hello Matthew!
Could you write me what do bits mean in the interrupt cause registers
for MV64340 Ethernet? I need to handle them in the interrupt handler for
the Gigabit Ethernet in the driver.
Best wishes,
Sergey Podstavin,
software engineer.
next reply other threads:[~2004-01-27 18:44 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2004-01-27 18:44 Sergey Podstavin [this message]
2004-01-27 19:39 ` Marvell MV64340 documentation Matthew Dharm
2004-01-27 19:39 ` Matthew Dharm
2004-01-27 19:44 ` Sergey Podstavin
2004-01-28 13:57 ` Ralf Baechle
-- strict thread matches above, loose matches on Subject: below --
2004-01-27 12:49 Clock interrupt simulation on sde-gdb navin
2004-01-27 13:47 ` Chris Dearman
2004-01-27 14:45 ` Marvell MV64340 documentation Pavel Kiryukhin
2004-01-27 15:25 ` Ralf Baechle
2004-01-27 18:12 ` Matthew Dharm
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