Re: MTD support on Motorola Hawk ASIC-based boards

[David Woodhouse <dwmw2@infradead.org>]

On Wed, 2004-07-07 at 14:41 -0400, Thomas W. Nelson wrote:
> Just as a sanity check (since I have so little left :-), will these 
> modifications also correctly deal with the 32-bit only write limitation 
> during probes?  Getting the chips into query mode appears to be the real 
> challenge here; I haven't been able to perform the correct incantation 
> to get them to respond in any way, CFI or JEDEC. 

You ought to be able to fake 64-bit buswidth for the case you described.
Play with it in GDB for a while, poking commands at various addresses
and looking for the idents.

> I'd also like to inject some personal observations about the more 
> complex flash geometries that are appearing.  On higher-end boards, such 
> as those from Dy4, Pentek, etc., these multibank interleaved 
> configurations are becoming very common as their customers want high 
> performance flash access for their XIP or flash filesystem-based 
> application environments. 

Whereas others just use Intel chips configured for burst reads... 

I suspect that the best way forward might be to turn the cfi_word
typedef into a structure with an array of unsigned longs. In the common
case there'll be only one of them, but for pathological cases there can
be many.

-- 
dwmw2