From: Clark Williams <williams@redhat.com>
To: Ralf Baechle <ralf@linux-mips.org>
Cc: MIPS Linux List <linux-mips@linux-mips.org>
Subject: Asm hack for GCC 3.4 changes
Date: Wed, 06 Oct 2004 10:28:06 -0500 [thread overview]
Message-ID: <1097076486.3185.23.camel@localhost.localdomain> (raw)
[-- Attachment #1: Type: text/plain, Size: 486 bytes --]
Ralf,
This is a patch I use on MIPS trees to deal with the changes in the way
GCC 3.4 handles the 'accum' pseudo register in inline asms. I originally
just applied it to time.c, but then I noticed that cpu-bugs64.c had an
inline asm that referenced 'accum', so I lifted the conditional macro
def to cpu.h, which was the only common header between time.c and
cpu-bugs64.c. Not really sure it's appropriate for cpu.h, but I didn't
want to create a new header.
Hope it's useful.
Clark
[-- Attachment #2: mips_gcc34.patch --]
[-- Type: text/x-patch, Size: 2014 bytes --]
--- include/asm-mips/cpu.h.orig 2004-01-19 12:23:16.000000000 -0600
+++ include/asm-mips/cpu.h 2004-10-06 09:48:58.415989000 -0500
@@ -219,4 +219,14 @@
#define MIPS_CPU_SUBSET_CACHES 0x00020000 /* P-cache subset enforced */
#define MIPS_CPU_PREFETCH 0x00040000 /* CPU has usable prefetch */
+// hack for GCC 3.4 inline asm change
+
+#if __GNUC__ == 3 && __GNUC_MINOR__ < 4
+#define CLOBBER_LO "lo","accum"
+#define CLOBBER_HILO "hi", "lo", "accum"
+#else
+#define CLOBBER_LO "lo"
+#define CLOBBER_HILO "hi", "lo"
+#endif
+
#endif /* _ASM_CPU_H */
--- arch/mips/kernel/time.c.orig 2004-09-19 07:30:04.000000000 -0500
+++ arch/mips/kernel/time.c 2004-10-06 09:49:13.360990000 -0500
@@ -277,7 +277,7 @@
__asm__("multu %1,%2"
: "=h" (res)
: "r" (count), "r" (sll32_usecs_per_cycle)
- : "lo", "accum");
+ : CLOBBER_LO);
/*
* Due to possible jiffies inconsistencies, we need to check
@@ -332,7 +332,7 @@
__asm__("multu %1,%2"
: "=h" (res)
: "r" (count), "r" (quotient)
- : "lo", "accum");
+ : CLOBBER_LO);
/*
* Due to possible jiffies inconsistencies, we need to check
@@ -374,7 +374,7 @@
: "r" (timerhi), "m" (timerlo),
"r" (tmp), "r" (USECS_PER_JIFFY),
"r" (USECS_PER_JIFFY_FRAC)
- : "hi", "lo", "accum");
+ : CLOBBER_HILO);
cached_quotient = quotient;
}
}
@@ -388,7 +388,7 @@
__asm__("multu %1,%2"
: "=h" (res)
: "r" (count), "r" (quotient)
- : "lo", "accum");
+ : CLOBBER_LO);
/*
* Due to possible jiffies inconsistencies, we need to check
--- arch/mips/kernel/cpu-bugs64.c.orig 2004-10-06 09:50:23.396989000 -0500
+++ arch/mips/kernel/cpu-bugs64.c 2004-10-06 09:50:41.006989000 -0500
@@ -82,7 +82,7 @@
".set pop"
: "=&r" (lv1), "=r" (lw)
: "r" (m1), "r" (m2), "r" (s), "I" (0)
- : "hi", "lo", "accum");
+ : CLOBBER_HILO);
/* We have to use single integers for m1 and m2 and a double
* one for p to be sure the mulsidi3 gcc's RTL multiplication
* instruction has the workaround applied. Older versions of
next reply other threads:[~2004-10-06 15:28 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2004-10-06 15:28 Clark Williams [this message]
2004-10-06 20:39 ` Asm hack for GCC 3.4 changes Ralf Baechle
2004-10-06 21:02 ` Clark Williams
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