Re: [PATCH v12 04/25] x86/resctrl: Apply Intel MBM quirk from rdt_get_l3_mon_config()

[Reinette Chatre <reinette.chatre@intel.com>]

Hi Tony and Babu,

On 9/22/26 1:46 PM, Luck, Tony wrote:
> On Mon, Sep 21, 2026 at 12:45:02PM -0500, Babu Moger wrote:
>> Hi Tony,
>>
>> I cannot test the AET telemetry functionality, but I have tested the series
>> on my AMD systems. It appears to work as expected, with no observed side
>> effects.
> 
> Hi Babu,
> 
> Awesome. Thanks for testing.
> 
>>
>> A few comments below.
>>
>>>   int __init rdt_get_l3_mon_config(struct rdt_resource *r)
>>>   {
>>>   	struct rdt_hw_resource *hw_res = resctrl_to_arch_res(r);
>>> @@ -500,25 +516,14 @@ int __init rdt_get_l3_mon_config(struct rdt_resource *r)
>>>   		hw_res->mbm_cntr_assign_enabled = true;
>>>   	}
>>> +	if (intel_rdt_mbm_need_quirk)
>>> +		intel_rdt_mbm_apply_quirk(r->mon.num_rmid);
>>
>> Not a bug right now.  Is it cleaner to send num_rmid instead of SNC adjusted
>> r->mon.num_rmid ?
> 
> This quirk only applies to Skylake and Broadwell CPU models, which don't have
> SNC. So there is no adjustment to r->mon.num_rmid. Future CPUs are using the
> ACPI ERDT enumeration of MBM which includes a mechanism for RMID scaling if
> needed. So this particular quirk isn't going to be re-used for new CPUs.
> 
> Is it cleaner? It's a few less characters in the source code - so maybe.
> 
> If Reinette agrees with you I can change for next spin of the series.

This is a good catch. This patch thus changes behavior while it claims to
just move code. Architectural enumeration should ideally not hide
(without comment) model-specific subtleties.

Reinette