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Thu, 23 Jan 2025 04:44:35 -0800 (PST) Message-ID: <10a655b0-1cdc-4e14-8fcf-221336ccc0ac@suse.com> Date: Thu, 23 Jan 2025 13:44:34 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] x86/PV: further harden guest memory accesses against speculative abuse To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper References: Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 23.01.2025 12:54, Roger Pau Monné wrote: > On Tue, Nov 05, 2024 at 02:56:42PM +0100, Jan Beulich wrote: >> The original implementation has two issues: For one it doesn't preserve >> non-canonical-ness of inputs in the range 0x8000000000000000 through >> 0x80007fffffffffff. Bogus guest pointers in that range would not cause a >> (#GP) fault upon access, when they should. >> >> And then there is an AMD-specific aspect, where only the low 48 bits of >> an address are used for speculative execution; the architecturally >> mandated #GP for non-canonical addresses would be raised at a later >> execution stage. Therefore to prevent Xen controlled data to make it >> into any of the caches in a guest controllable manner, we need to >> additionally ensure that for non-canonical inputs bit 47 would be clear. >> >> See the code comment for how addressing both is being achieved. >> >> Fixes: 4dc181599142 ("x86/PV: harden guest memory accesses against speculative abuse") >> Signed-off-by: Jan Beulich >> --- >> RFC: Two variants of part of the logic are being presented, both with >> certain undesirable aspects: The first form is pretty large and >> ugly (some improvement may be possible by introducing further >> helper macros). The alternative form continues to use RCR, which >> generally would be nice to do away with. Then again that's also >> slightly smaller generated code. > > Oh, I assume that's why there's a hardcoded .if 1, I was wondering > about that. What's the specific issue with using rcr? It's slower than SHL. Albeit - checking a few places - not as much as I thought I remembered it would be. > And why is the > more complex set of macros that use setc plus a shl better? They're slightly longer (beyond the source complexity), but (presumably) a little faster. > Why not use cmovc: > > mov $(1 << 63), \scratch1 > cmovc \scratch1, \scratch2 > > AFAICT \scratch1 is not used past the btr instruction, and hence can > be used for the cmovc? Such an alternative was already considered back at the time: https://lists.xen.org/archives/html/xen-devel/2021-02/msg01067.html. Granted I was wrong there about needing a 3rd scratch register, but the code size consideration remains - we have dozens of instances of this macro in the resulting binary, after all. Yet ftaod, this isn't to mean we can't re-consider. Given the above I'm inclined though to go the RCR route. Jan