From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stefan Agner Subject: RE: [PATCH] drm/fsl-dcu: fix endian issue when using clk_register_divider Date: Mon, 05 Sep 2016 12:24:18 -0700 Message-ID: <10c3b7b3a84d8406a7aa44867ea1a124@agner.ch> References: <20160902190753.27736-1-stefan@agner.ch> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from mail.kmu-office.ch (mail.kmu-office.ch [178.209.48.109]) by gabe.freedesktop.org (Postfix) with ESMTPS id 8893F6E1EA for ; Mon, 5 Sep 2016 19:29:37 +0000 (UTC) In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Meng Yi Cc: jianwei.wang.chn@gmail.com, stable@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, alison.wang@freescale.com List-Id: dri-devel@lists.freedesktop.org T24gMjAxNi0wOS0wNSAwMTo0NiwgTWVuZyBZaSB3cm90ZToKPj4gU3ViamVjdDogW1BBVENIXSBk cm0vZnNsLWRjdTogZml4IGVuZGlhbiBpc3N1ZSB3aGVuIHVzaW5nIGNsa19yZWdpc3Rlcl9kaXZp ZGVyCj4+Cj4+IFNpbmNlIHVzaW5nIGNsa19yZWdpc3Rlcl9kaXZpZGVyIHRvIHNldHVwIHRoZSBw aXhlbCBjbG9jaywgcmVnbWFwIGlzIG5vIGxvbmdlcgo+PiB1c2VkLiBSZWdtYXAgZGlkIHRha2Ug Y2FyZSBvZiBEQ1UgdXNpbmcgZGlmZmVyZW50IGVuZGlhbm5lc3MuIENoZWNrCj4+IGVuZGlhbm5l c3MgdXNpbmcgdGhlIGRldmljZS10cmVlIHByb3BlcnR5ICJiaWctZW5kaWFuIiB0byBkZXRlcm1p bmUgdGhlCj4+IGxvY2F0aW9uIG9mIERJVl9SQVRJTy4KPj4KPj4gQ2M6IHN0YWJsZUB2Z2VyLmtl cm5lbC5vcmcKPj4gRml4ZXM6IDJkNzAxNDQ5YmNlMSAoImRybS9mc2wtZGN1OiB1c2UgY29tbW9u IGNsb2NrIGZyYW1ld29yayBmb3IgcGl4ZWwKPj4gY2xvY2sgZGl2aWRlciIpCj4+IFJlcG9ydGVk LWJ5OiBNZW5nIFlpIDxtZW5nLnlpQG54cC5jb20+Cj4+IFNpZ25lZC1vZmYtYnk6IFN0ZWZhbiBB Z25lciA8c3RlZmFuQGFnbmVyLmNoPgoKPHNuaXA+Cgo+IAo+IFRlc3RlZC1ieTogTWVuZyBZaSA8 bWVuZy55aUBueHAuY29tPgo+IE9uIExTMTAyMUEtVFdSIGJvYXJkLgoKVGhhbmtzLCBhcHBsaWVk IQoKLS0KU3RlZmFuCl9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fCmRyaS1kZXZlbCBtYWlsaW5nIGxpc3QKZHJpLWRldmVsQGxpc3RzLmZyZWVkZXNrdG9wLm9y ZwpodHRwczovL2xpc3RzLmZyZWVkZXNrdG9wLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2RyaS1kZXZl bAo= From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934993AbcIET3i (ORCPT ); Mon, 5 Sep 2016 15:29:38 -0400 Received: from mail.kmu-office.ch ([178.209.48.109]:51254 "EHLO mail.kmu-office.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932235AbcIET3h (ORCPT ); Mon, 5 Sep 2016 15:29:37 -0400 MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Date: Mon, 05 Sep 2016 12:24:18 -0700 From: Stefan Agner To: Meng Yi Cc: dri-devel@lists.freedesktop.org, alison.wang@freescale.com, jianwei.wang.chn@gmail.com, linux-kernel@vger.kernel.org, stable@vger.kernel.org Subject: RE: [PATCH] drm/fsl-dcu: fix endian issue when using clk_register_divider In-Reply-To: References: <20160902190753.27736-1-stefan@agner.ch> Message-ID: <10c3b7b3a84d8406a7aa44867ea1a124@agner.ch> User-Agent: Roundcube Webmail/1.1.3 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2016-09-05 01:46, Meng Yi wrote: >> Subject: [PATCH] drm/fsl-dcu: fix endian issue when using clk_register_divider >> >> Since using clk_register_divider to setup the pixel clock, regmap is no longer >> used. Regmap did take care of DCU using different endianness. Check >> endianness using the device-tree property "big-endian" to determine the >> location of DIV_RATIO. >> >> Cc: stable@vger.kernel.org >> Fixes: 2d701449bce1 ("drm/fsl-dcu: use common clock framework for pixel >> clock divider") >> Reported-by: Meng Yi >> Signed-off-by: Stefan Agner > > Tested-by: Meng Yi > On LS1021A-TWR board. Thanks, applied! -- Stefan