From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from perceval.ideasonboard.com ([213.167.242.64]:40272 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725948AbeHTOFi (ORCPT ); Mon, 20 Aug 2018 10:05:38 -0400 From: Laurent Pinchart To: Ulrich Hecht Cc: linux-renesas-soc@vger.kernel.org, dri-devel@lists.freedesktop.org, jacopo+renesas@jmondi.org, kieran.bingham+renesas@ideasonboard.com, Koji Matsuoka , Takeshi Kihara Subject: Re: [PROTO][PATCH 07/10] arm64: dts: r8a77995-draak: set external clock for DU Date: Mon, 20 Aug 2018 13:51:25 +0300 Message-ID: <11044309.AFJYkQDyTF@avalon> In-Reply-To: <1534254604-24204-8-git-send-email-uli+renesas@fpond.eu> References: <1534254604-24204-1-git-send-email-uli+renesas@fpond.eu> <1534254604-24204-8-git-send-email-uli+renesas@fpond.eu> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Sender: linux-renesas-soc-owner@vger.kernel.org List-ID: Hi Ulrich, Thank you for the patch. On Tuesday, 14 August 2018 16:50:01 EEST Ulrich Hecht wrote: > From: Koji Matsuoka > > Signed-off-by: Koji Matsuoka > Signed-off-by: Takeshi Kihara > Signed-off-by: Ulrich Hecht > --- > arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 8 +++++--- > 1 file changed, 5 insertions(+), 3 deletions(-) > > diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts > b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts index a8e8f26..bd5c6fa > 100644 > --- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts > +++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts > @@ -2,7 +2,7 @@ > /* > * Device Tree Source for the Draak board > * > - * Copyright (C) 2016 Renesas Electronics Corp. > + * Copyright (C) 2016-2018 Renesas Electronics Corp. > * Copyright (C) 2017 Glider bvba > */ > > @@ -269,8 +269,10 @@ > > clocks = <&cpg CPG_MOD 724>, > <&cpg CPG_MOD 723>, > - <&x12_clk>; > - clock-names = "du.0", "du.1", "dclkin.0"; > + <&x12_clk>, > + <&extal_clk>; > + clock-names = "du.0", "du.1", > + "dclkin.0", "extal"; This should be moved to the LVDS encoder DT node. > ports { > port@0 { -- Regards, Laurent Pinchart From mboxrd@z Thu Jan 1 00:00:00 1970 From: Laurent Pinchart Subject: Re: [PROTO][PATCH 07/10] arm64: dts: r8a77995-draak: set external clock for DU Date: Mon, 20 Aug 2018 13:51:25 +0300 Message-ID: <11044309.AFJYkQDyTF@avalon> References: <1534254604-24204-1-git-send-email-uli+renesas@fpond.eu> <1534254604-24204-8-git-send-email-uli+renesas@fpond.eu> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) by gabe.freedesktop.org (Postfix) with ESMTPS id B27CF6E28B for ; Mon, 20 Aug 2018 10:50:31 +0000 (UTC) In-Reply-To: <1534254604-24204-8-git-send-email-uli+renesas@fpond.eu> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Ulrich Hecht Cc: Takeshi Kihara , Koji Matsuoka , dri-devel@lists.freedesktop.org, linux-renesas-soc@vger.kernel.org, kieran.bingham+renesas@ideasonboard.com, jacopo+renesas@jmondi.org List-Id: dri-devel@lists.freedesktop.org SGkgVWxyaWNoLAoKVGhhbmsgeW91IGZvciB0aGUgcGF0Y2guCgpPbiBUdWVzZGF5LCAxNCBBdWd1 c3QgMjAxOCAxNjo1MDowMSBFRVNUIFVscmljaCBIZWNodCB3cm90ZToKPiBGcm9tOiBLb2ppIE1h dHN1b2thIDxrb2ppLm1hdHN1b2thLnhtQHJlbmVzYXMuY29tPgo+IAo+IFNpZ25lZC1vZmYtYnk6 IEtvamkgTWF0c3Vva2EgPGtvamkubWF0c3Vva2EueG1AcmVuZXNhcy5jb20+Cj4gU2lnbmVkLW9m Zi1ieTogVGFrZXNoaSBLaWhhcmEgPHRha2VzaGkua2loYXJhLmRmQHJlbmVzYXMuY29tPgo+IFNp Z25lZC1vZmYtYnk6IFVscmljaCBIZWNodCA8dWxpK3JlbmVzYXNAZnBvbmQuZXU+Cj4gLS0tCj4g IGFyY2gvYXJtNjQvYm9vdC9kdHMvcmVuZXNhcy9yOGE3Nzk5NS1kcmFhay5kdHMgfCA4ICsrKysr LS0tCj4gIDEgZmlsZSBjaGFuZ2VkLCA1IGluc2VydGlvbnMoKyksIDMgZGVsZXRpb25zKC0pCj4g Cj4gZGlmZiAtLWdpdCBhL2FyY2gvYXJtNjQvYm9vdC9kdHMvcmVuZXNhcy9yOGE3Nzk5NS1kcmFh ay5kdHMKPiBiL2FyY2gvYXJtNjQvYm9vdC9kdHMvcmVuZXNhcy9yOGE3Nzk5NS1kcmFhay5kdHMg aW5kZXggYThlOGYyNi4uYmQ1YzZmYQo+IDEwMDY0NAo+IC0tLSBhL2FyY2gvYXJtNjQvYm9vdC9k dHMvcmVuZXNhcy9yOGE3Nzk5NS1kcmFhay5kdHMKPiArKysgYi9hcmNoL2FybTY0L2Jvb3QvZHRz L3JlbmVzYXMvcjhhNzc5OTUtZHJhYWsuZHRzCj4gQEAgLTIsNyArMiw3IEBACj4gIC8qCj4gICAq IERldmljZSBUcmVlIFNvdXJjZSBmb3IgdGhlIERyYWFrIGJvYXJkCj4gICAqCj4gLSAqIENvcHly aWdodCAoQykgMjAxNiBSZW5lc2FzIEVsZWN0cm9uaWNzIENvcnAuCj4gKyAqIENvcHlyaWdodCAo QykgMjAxNi0yMDE4IFJlbmVzYXMgRWxlY3Ryb25pY3MgQ29ycC4KPiAgICogQ29weXJpZ2h0IChD KSAyMDE3IEdsaWRlciBidmJhCj4gICAqLwo+IAo+IEBAIC0yNjksOCArMjY5LDEwIEBACj4gCj4g IAljbG9ja3MgPSA8JmNwZyBDUEdfTU9EIDcyND4sCj4gIAkJIDwmY3BnIENQR19NT0QgNzIzPiwK PiAtCQkgPCZ4MTJfY2xrPjsKPiAtCWNsb2NrLW5hbWVzID0gImR1LjAiLCAiZHUuMSIsICJkY2xr aW4uMCI7Cj4gKwkJIDwmeDEyX2Nsaz4sCj4gKwkJIDwmZXh0YWxfY2xrPjsKPiArCWNsb2NrLW5h bWVzID0gImR1LjAiLCAiZHUuMSIsCj4gKwkJICAgICAgImRjbGtpbi4wIiwgImV4dGFsIjsKClRo aXMgc2hvdWxkIGJlIG1vdmVkIHRvIHRoZSBMVkRTIGVuY29kZXIgRFQgbm9kZS4KCj4gIAlwb3J0 cyB7Cj4gIAkJcG9ydEAwIHsKCi0tIApSZWdhcmRzLAoKTGF1cmVudCBQaW5jaGFydAoKCgpfX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwpkcmktZGV2ZWwgbWFp bGluZyBsaXN0CmRyaS1kZXZlbEBsaXN0cy5mcmVlZGVza3RvcC5vcmcKaHR0cHM6Ly9saXN0cy5m cmVlZGVza3RvcC5vcmcvbWFpbG1hbi9saXN0aW5mby9kcmktZGV2ZWwK